Senior Signal and Power Integrity Engineer, Hardware

Nvidia

Confirmed live today High trust
Hybrid

Quick summary

Work type
Hybrid
Location
Santa Clara, CA
Salary
$136,000–$218,500 / yr
Employment
Full-time
Posted
15 days ago
Freshness
Confirmed live today

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $189k
This role $177k
$125k $239k
below market most similar roles pay here above market

This role pays less than 59% of similar roles. Most pay $161,975–$216,250 — the blue band above. At the midpoint, this role pays about $177k versus about $189k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1623 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 1110 roles with salary data.

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At a glance

TL;DR · Senior Signal and Power Integrity Engineer, Hardware

The Senior Signal and Power Integrity Engineer - Hardware joins a dynamic team to solve complex system design problems involving high-speed interfaces. The role involves crafting signal integrity solutions for NVlinks 200Gbs+, USB-4, PCIe5, GDDR6, and LP5X. Key responsibilities include performing system-level signal integrity simulations, modeling vias, connectors, and sockets in 3D EM tools, and optimizing Power Delivery Networks across packages and PCBs. The engineer will improve SI/PI models through lab measurements and automate data gathering using JMP and MATLAB. Required technical skills include proficiency with ANSYS HFSS, Q3D, and SIWAVE, along with experience in layout extraction and spice-based time domain simulations. The position addresses technical challenges in high-speed interface design, link architecture, and timing budget methodologies for silicon, package, and board impairments.

What you'll do

  • Craft creative Signal Integrity solutions for complex system design problems.
  • Perform system-level signal integrity simulations for high-speed NVlinks, USB-4, PCIe5, and GDDR6.
  • Model vias, connectors, sockets, and various system components using 3D EM tools.
  • Design and optimize Power Delivery Networks (PDN) across packages and PCBs.
  • Improve SI/PI models through regular lab measurements and data correlation.
  • Automate simulations and perform data analysis and visualization using JMP or MATLAB.
  • Optimize package, PCB, ASIC, and mixed-signal circuit designs in a cross-functional role.

What we're looking for

  • BS/MS in Electrical Engineering or equivalent experience.
  • 3+ years of industry experience.
  • SI/PI work experience on standards such as PCIe, USB, SATA, HDMI, HBM, DDR5, GDDR6, or LPDDR5X.
  • Hands-on use of 3-D modeling tools like ANSYS HFSS/Q3D and 2.5-D tools like ANSYS SIWAVE or similar.
  • Experience with PDN evaluation using layout extraction tools for packages and PCBs and spice-based time domain simulations.
  • Background with system-level timing or loss budgets including silicon, package, and board impairments.
  • Familiarity with VNA, TDR, DSO, ParBERT, and applications like JMP or Matlab (preferred).
  • Expertise in high-speed interface SI/PI design, lab measurements, and debugging (preferred).

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