Senior Physical Design Engineer

Nvidia

Confirmed live today High trust

Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$168,000–$264,500 / yr
Employment
Full-time
Posted
60 days ago
Freshness
Confirmed live today
Nearby
99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $192k
This role $216k
$137k most similar roles pay here $278k

This role pays more than 75% of similar roles. Most pay $168,200–$216,250 — the shaded band above. At the midpoint, this role pays about $216k versus about $192k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1371 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 1096 roles with salary data.

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View all roles at Nvidia

At a glance

TL;DR · Senior Physical Design Engineer

Role Posting Log in to save

As a Senior Physical Design Engineer, you will join the team to drive physical design and timing from netlist to gds. Your daily responsibilities include partnering with mixed signal teams to integrate Analog IOs and macros while managing multi-mode and multi-corner timing closure, RC extraction, Crosstalk, IR drop, and EM analysis. You will collaborate with Front-end teams to create and update timing constraints, perform physical verification including DRC, ERC, LVS, and Antenna checks, and debug timing violations by implementing functional and Timing ECOs while performing formal verification. The role requires proficiency in Synopsys or Cadence place and route, physical design, and timing tools, along with the ability to form methodologies and automate flows. Knowledge of scan insertion and DFT is also beneficial for this technical hardware engineering position.

What does a Physical Design Engineer earn?

Median $179650 from 40 postings across 9 companies.

See salary data

Skills

Physical Design Timing Closure RC Extraction Cross Talk IR Drop EM Analysis DRC ERC LVS Antenna Checks Synopsys Cadence Scan Insertion DFT Formal Verification ECO GDS Netlist

What you'll do

  • Drive physical design and timing from netlist to GDS.
  • Integrate Analog IOs and macros in partnership with mixed signal teams.
  • Perform multi-mode and multi-corner timing closure, RC extraction, and IR drop analysis.
  • Create and update timing constraints in coordination with front-end teams.
  • Execute physical verification including DRC, ERC, LVS, and antenna checks.
  • Debug timing violations and implement functional and timing ECOs.
  • Perform formal verification to ensure design integrity.
  • Develop methodologies and automate physical design flows.

What we're looking for

  • BS in Electrical or Computer Engineering with 6+ years of experience or an MS with 3+ years of experience in physical design.
  • Experience using Synopsys or Cadence place and route, physical design, and timing tools.
  • Ability to form methodologies and automate flows.
  • Knowledge of scan insertion and DFT (preferred).

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