Senior Hardware/Software Design Engineer (HSDE-3)

Leidos

Quick summary

Work type
On-site
Location
Annapolis Junction, MD
Salary
$131,300–$237,350 / yr
Posted
2 days ago

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $178k
This role $184k
$119k most similar roles pay here $250k

This role pays more than 65% of similar roles. Most pay $142,400–$213,781 — the shaded band above. At the midpoint, this role pays about $184k versus about $178k for comparable roles.

Based on 240 similar postings.

Employer

About Leidos

Leidos is an industry and technology leader serving government and commercial customers with smarter, more efficient digital and mission innovations.

Leidos currently has 245 open roles on FindRole.

Listed pay typically runs $107,900–$195,050 across 235 roles with salary data.

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View all roles at Leidos

At a glance

TL;DR · Senior Hardware/Software Design Engineer (HSDE-3)

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Leidos seeks a Senior Hardware/Software Design Engineer to join its Cyber & Analytics Business Area team, focusing on developing electronic hardware and software processing components for RF communication systems. This role involves designing FPGA-based solutions, implementing digital signal processing algorithms, integrating with existing Linux codebases, and documenting technical efforts. The engineer will lead design initiatives, optimize FPGA resources, and bridge the gap between hardware and software stacks to deliver mission-critical subsystems. Essential skills include expertise in FPGA development, digital signal processing, C/C++ programming, and familiarity with tools like Vivado and Epiq Solution PDK for enhanced performance.

Skills

FPGA Vivado Digital Signal Processing C C++ Linux DSP Algorithms RTL Development Timing Closure Resource Optimization System-Level Software integration code Epiq Solution PDK

What you'll do

  • Design and develop FPGA hardware for RF communication systems.
  • Implement digital signal processing algorithms in FPGA hardware.
  • Integrate FPGA designs with existing Linux software code bases.
  • Optimize FPGA resources to meet timing closure requirements.
  • Document technical design efforts and integration processes thoroughly.

What we're looking for

  • Strong FPGA development and digital signal processing implementation experience.
  • Expertise in integrating FPGA code with existing Linux-based software systems.
  • Proficiency in C and C++ programming for system-level software integration.
  • Bachelor's degree plus 8 years of relevant hardware/software engineering experience.
  • Active TS/SCI security clearance with polygraph required.
  • Experience with Vivado and Epiq Solution PDK preferred but not mandatory.

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