Senior Engineer, GPU RTL Design

Samsung Electronics

Confirmed live today Trusted

Quick summary

Work type
On-site
Location
Austin, TXSan Jose, CA
Salary
$124,000–$208,400 / yr
Employment
Full-time
Posted
18 days ago
Freshness
Confirmed live today
Closes
Jun 30, 2027

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $205k
This role $166k
$109k $260k
below market most similar roles pay here above market

This role pays less than 85% of similar roles. Most pay $177,250–$233,050 — the blue band above. At the midpoint, this role pays about $166k versus about $205k for comparable roles.

Based on 240 similar postings.

Employer

About Samsung Electronics

Samsung Electronics is a South Korean multinational corporation and a global leader in technology, specializing in consumer electronics, semiconductors, and home appliances.

Samsung Electronics currently has 94 open roles on FindRole.

Listed pay typically runs $106,000–$174,500 across 85 roles with salary data.

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At a glance

TL;DR · Senior Engineer, GPU RTL Design

As a Senior Engineer, GPU RTL Design, you will join the GPU Project and RTL teams at SARC/ACL to develop complex RTL blocks and subsystems for next-generation mobile GPU IPs. You will translate architectural specifications into scalable hardware designs, focusing on control logic, datapath, cache, and memory systems. Your daily responsibilities include driving microarchitecture definitions, developing clean synthesizable RTL, and collaborating with architecture, physical design, and verification teams to resolve interface, timing, power, and area tradeoffs. You will utilize Verilog and SystemVerilog within front-end ASIC design flows, including linting, synthesis, and timing analysis. This role addresses the technical challenge of delivering high-performance, energy-efficient graphics, specifically supporting advanced features like hardware ray tracing for premium mobile devices and other high-performance computing segments.

What you'll do

  • Design and develop complex RTL blocks and subsystems for next-generation mobile GPU IPs.
  • Translate architectural specifications into efficient, maintainable, and scalable hardware designs.
  • Drive the design lifecycle from microarchitecture definition through RTL development, integration, and simulation readiness.
  • Develop clean, synthesizable RTL and perform linting, synthesis, and timing analysis.
  • Resolve functional design challenges regarding interface definition, timing, power, performance, and area tradeoffs.
  • Collaborate with verification teams to resolve functional issues and ensure design coverage and robustness.
  • Identify and propose data-driven solutions for cross-block challenges and emerging GPU technologies.

What we're looking for

  • Relevant experience in semiconductor RTL design for complex SoC, CPU, or GPU architectures.
  • Hands-on experience in RTL design using Verilog/SystemVerilog, including microarchitecture development, integration, and debug.
  • Working knowledge of GPU or high-performance digital design concepts, including control logic, datapath, memory systems, and Cache design.
  • Working knowledge of interpreting architectural specifications and driving design tradeoffs across performance, power, and area (PPA).
  • Experience with front-end ASIC design flows, including linting, synthesis, timing analysis, and design quality checks.
  • Strong analytical and problem-solving skills to identify and propose data-driven solutions.
  • Excellent written and verbal communication skills for technical documentation.
  • Applicants must be authorized to access information subject to U.S. export control laws or eligible for government authorization.

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