Senior Director SoC Architecture, AI Accelerators

Qualcomm

Confirmed live today High trust

Quick summary

Work type
On-site
Location
San Diego, CAAustin, TXHillsboro, ORSanta Clara, CA
Salary
$256,600–$385,000 / yr
Posted
40 days ago
Freshness
Confirmed live today
Closes
Mar 16, 2027

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $239k
This role $321k
$160k $409k
below market most similar roles pay here above market

This role pays more than 92% of similar roles. Most pay $196,750–$281,475 — the blue band above. At the midpoint, this role pays about $321k versus about $239k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 575 open roles on FindRole.

Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.

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At a glance

TL;DR · Senior Director SoC Architecture, AI Accelerators

Senior Director SoC Architecture - AI Accelerators leads rack-scale systems architecture and execution for data center platforms within the ASICS Engineering group. This leadership role involves driving platform direction across silicon, hardware, software, and firmware teams to deliver scalable infrastructure solutions. Key responsibilities include owning rack-scale architecture for compute, networking, power, and cooling, while establishing OCP-aligned designs and platform standards. The position requires leading platform execution from concept through production readiness, driving hardware-software co-design for telemetry and observability, and managing cross-functional alignment. Necessary skills include ASIC design, verification, validation, and integration experience. The role specifically addresses the technical challenges of next-generation compute platforms, focusing on technologies such as CXL, composable infrastructure, and advanced interconnects to solve high-performance, energy-efficient server and AI infrastructure requirements for hyperscale and enterprise environments.

What you'll do

  • Lead rack-scale systems architecture and platform direction for AI and data center roadmaps.
  • Own architecture across compute, networking, power, cooling, and system integration.
  • Establish OCP-aligned rack-level designs and platform standards.
  • Drive hardware-software co-design including firmware, telemetry, observability, and rack management.
  • Lead platform execution from initial concept through validation and customer deployment.
  • Partner with hyperscalers, OEMs, and ODMs to scale technology adoption.
  • Establish program KPIs, technical reviews, and operating cadences to ensure predictable execution.
  • Drive adoption of next-generation technologies like CXL and composable infrastructure.

What we're looking for

  • Bachelor's degree in Science, Engineering, or related field and 10+ years of ASIC design, verification, validation, integration, or related work experience.
  • Master's degree in Science, Engineering, or related field and 9+ years of ASIC design, verification, validation, integration, or related work experience.
  • PhD in Science, Engineering, or related field and 8+ years of ASIC design, verification, validation, integration, or related work experience.
  • Master's Degree in Engineering, Information Systems, Computer Science or related field (preferred).
  • 15+ years of Systems Engineering or related work experience (preferred).
  • 15+ years of 4G/5G/6G systems and associated cellular standards (preferred).
  • 4+ years of experience working in a large matrixed organization (preferred).
  • 4+ years of supervisory experience (preferred).

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