This role pays more than
73%
of similar roles. Most pay
$177,900–$245,675
— the shaded band above.
At the midpoint, this role pays about
$236k
versus about
$212k
for comparable roles.
Based on 240 similar postings.
Employer
About Nvidia
Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing
Nvidia currently has
896 open roles
on FindRole.
Listed pay typically runs
$184,000–$287,500
across 876 roles with salary data.
As a Senior SoC Architect, RAS, you will join the Tegra System-on-Chips team to define and deliver reliability, availability, and serviceability features for advanced CPUs and SoCs. You will own RAS hardware architecture from early concepts through design implementation, verification, validation, and production readiness. Your daily work involves developing requirements for fault detection, correction, containment, telemetry, and recovery across interconnects, memory systems, and IOs. You will collaborate with firmware, software, and validation teams to ensure features are implementable and debuggable. The role requires expertise in SystemC, C/C++, and Python for modeling, alongside experience with ECC, parity, redundancy, and fault injection. This position addresses critical reliability challenges in high-stakes environments, including datacenters, autonomous vehicles, and space-aware applications where radiation effects and memory corruption impact system integrity and performance.
Define and drive SoC-level RAS hardware architecture across CPUs, interconnects, memory systems, and I/Os.
Own RAS features from initial concept through micro-architecture alignment, RTL implementation, and production readiness.
Develop architectural requirements for fault detection, correction, containment, telemetry, and recovery mechanisms.
Create hardware specifications, error-handling flows, and architectural models using SystemC, C++, or Python.
Plan and review verification strategies including error injection, coverage analysis, and resiliency modeling.
Perform silicon debug and failure analysis to develop diagnostic methods for latent or intermittent failures.
Apply RAS principles to high-reliability environments, including space-aware and radiation-aware system designs.
Patent novel hardware architecture techniques that improve system observability and serviceability.
What we're looking for
MS or PhD degree in computer engineering, electrical engineering, or equivalent experience.
At least 8 years of SoC architecture, design, verification, reliability, silicon validation, or related hardware development experience.
Strong understanding of Reliability, Availability, and Serviceability (RAS) mechanisms including fault detection, correction, containment, telemetry, and recovery.
Experience driving hardware features through the full lifecycle from architectural definition to production readiness.
Expertise in SoC architecture areas such as safety, debug, clocks, resets, interconnects, memory controllers, or IO technologies.
Hands-on experience with design verification, silicon validation, fault injection, coverage analysis, and resiliency modeling.
Familiarity with radiation effects, space operation, or other high-reliability deployment environments is strongly valued.
Excellent analytical, written, and verbal interpersonal skills to collaborate across cross-functional teams.
Remote (Santa Clara, CA)+343 days ago
$198,600–$297,800
SoC Architecture
CPU Microarchitecture
Performance Modeling
Linux
Firmware
Memory Management
PMU
Data Analysis
Scripting
System Configuration
I/O Subsystems