Senior Custom Circuits Timing Engineer

Nvidia

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Hybrid

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Work type
Hybrid
Location
Santa Clara, CA
Employment
Full-time
Posted
138 days ago
Freshness
Confirmed live today

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About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1623 open roles on FindRole.

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TL;DR · Senior Custom Circuits Timing Engineer

The Senior Custom Circuits Timing Engineer joins the Circuit Solutions Group to participate in groundbreaking processor design using deep submicron technologies. This role involves driving timing analysis and closure for custom circuit macros, including digital, semi-custom, and mixed-signal analog designs. Key responsibilities include developing timing models and methodology at the transistor level, validating designs using NanoTime and SPICE simulations, and collaborating with various teams on timing constraints, power convergence, and ECO implementation. The ideal candidate possesses expertise in transistor-level STA tools, timing constraints management, and process variation effect modeling. Required skills include knowledge of crosstalk, noise analysis, and clocking specifications like jitter and IR drop. Candidates should also understand .libs usage in NanoTime and PrimeTime to ensure accuracy in innovative circuit topologies.

What you'll do

  • Drive timing analysis and closure for custom circuit macros including digital, semi-custom, and mixed-signal analog designs.
  • Develop timing models and methodologies for innovative custom macro designs at the transistor level.
  • Validate timing of custom circuit designs using NanoTime and various SPICE simulations.
  • Standardize and improve timing convergence flows in coordination with methodology teams.
  • Validate transistor-level timing accuracy and correctness with circuit designers and tool developers.
  • Define timing closure strategies, constraints, and power convergence with PD, DFX, and Clock teams.
  • Implement ECOs to fix timing paths, including crosstalk and noise analysis.
  • Model process variation effects and ensure design convergence across deep submicron technologies.

What we're looking for

  • BS in Electrical or Computer Engineering or equivalent experience.
  • 8+ years of experience for Bachelors or 6+ years for Masters in custom circuit timing analysis and closure.
  • Expertise in industry standard transistor level STA tools such as NanoTime and timing convergence tools.
  • Solid experience in timing constraints generation and management for mixed-signal designs.
  • Basic understanding of transistor-level circuits and SPICE simulations for correlation to static timing and noise results.
  • Expertise in analysis and fixing of timing paths through ECOs, including crosstalk and noise analysis.
  • Knowledge of process variation effect modeling and design convergence.
  • Familiarity with clocking specs such as jitter, IR drop, and crosstalk.

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