Senior Circuit Timing Engineer

Nvidia

Confirmed live yesterday High trust

Remote

Quick summary

Work type: Remote
Location: Santa Clara, CA
Salary: $168,000–$264,500 / yr
Employment: Full-time
Posted: 16 days ago
Freshness: Confirmed live yesterday
Nearby: 99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $190k

This role $216k

$131k $279k

below market most similar roles pay here above market

This role pays more than 80% of similar roles. Most pay $163,500–$216,250 — the blue band above. At the midpoint, this role pays about $216k versus about $190k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 1623 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 1110 roles with salary data.

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At a glance

TL;DR · Senior Circuit Timing Engineer

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The Senior Circuit Timing Engineer joins a global circuits team to participate in groundbreaking processor design using deep submicron technologies. The role involves designing innovative circuits for hardware security, adaptive clocking, and power management solutions while driving timing analysis and signoff for custom circuit macros, including digital, semi-custom, and analog mixed-signal designs. Key responsibilities include validating designs using STA tools like Nanotime, PrimeTime, and Tempus, performing SPICE simulations, and developing timing models for unique custom macro designs. The engineer must manage timing constraints, perform ECO implementation, and integrate AI/ML techniques into the design methodology. Required expertise includes deep submicron process issues, transistor-level analysis, and power gating. The work focuses on improving power, performance, area, and reliability for next-generation products through detailed transistor-level analysis and timing closure.

Skills

STA Nanotime PrimeTime Tempus SPICE Digital Circuit Design Mixed-Signal Transistor-level Analysis DFT ECO EM/IR Analysis RTL Design Synthesis Auto Place and Route PVerf Post-Silicon Characterization Power Gating Multi-VT

What you'll do

Design innovative circuits for hardware security, adaptive clocking, and power management solutions.
Drive timing analysis and signoff for custom digital, semi-custom, and analog mixed-signal circuit macros.
Validate timing of custom circuit designs using STA tools like Nanotime, PrimeTime, and Tempus.
Perform transistor-level circuit design, schematic entry, and layout delivery.
Develop timing models and methodologies for unique custom macro designs.
Integrate AI/ML techniques directly into the design process and methodology.
Manage timing constraints, power convergence, and timing ECO implementations with cross-functional teams.

What we're looking for

BSEE/MS preferred in Electrical, Computer Engineering, or equivalent experience.
6+ years of digital circuit design experience for Masters and 8+ years for Bachelors.
Excellent understanding of deep submicron process issues and digital circuit design techniques.
Expertise in industry standard STA tools such as Nanotime, Primetime, and Tempus.
Hands-on experience running Spice simulations, EM/IR analysis, and static timing analysis/closure.
Proven experience in timing constraints generation and management.
Hands-on experience in design and analysis of low power circuits is a plus.
Proven ownership across the entire silicon design flow from micro-architecture to back-end execution (preferred).

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