Senior ASIC Methodology Engineer

Nvidia

Confirmed live yesterday High trust
Remote

Quick summary

Work type
Remote
Location
Remote
Salary
$152,000–$241,500 / yr
Posted
63 days ago
Freshness
Confirmed live yesterday

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $199k
This role $197k
$141k most similar roles pay here $252k

This role pays more than 54% of similar roles. Most pay $175,000–$223,000 — the shaded band above. At the midpoint, this role pays about $197k versus about $199k for comparable roles.

Based on 240 similar postings.

Employer

About Nvidia

Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing

Nvidia currently has 896 open roles on FindRole.

Listed pay typically runs $184,000–$287,500 across 876 roles with salary data.

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At a glance

TL;DR · Senior ASIC Methodology Engineer

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As a Senior ASIC Methodology Engineer - LPU Division, you will join an outstanding ASIC development team to invent the next wave of hardware development methodology. You will pioneer AI-driven and sophisticated automation techniques to transform how complex ASICs are conceived, explored, and brought to closure. Your daily responsibilities include identifying cross-stage bottlenecks in the lifecycle, curating real-time data for AI models, establishing quantitative metrics for efficiency, and mentoring engineers on emerging techniques. You will also track advancements in EDA and hardware design research to guide strategic investments. The role requires expertise in RTL, functional verification, formal verification, or physical design. Required technical skills include high-level programming with Python, PERL, Make, and shell scripting, along with experience in AI frameworks and agentic flow development to solve complex problems in the artificial intelligence hardware space.

Skills

ASIC RTL Functional Verification Formal Verification Physical Design Python Perl Make Shell Scripting AI Frameworks Agentic Flow EDA Data Pipelines Automation Hardware Design

What you'll do

  • Identify cross-stage bottlenecks in the ASIC development lifecycle to implement automation and AI improvements.
  • Develop novel architectures and end-to-end workflows for logic design, verification, and physical design.
  • Curate and leverage real-time data to build scalable and secure pipelines for AI models.
  • Establish quantitative metrics to measure efficiency, quality, and cycle-time improvements in hardware development.
  • Serve as a technical catalyst by sharing best practices and mentoring engineers on AI-enabled techniques.
  • Track advances in AI, EDA, and hardware design research to guide strategic technology investments.

What we're looking for

  • Bachelor's or Master's degree in Computer Science, Computer Engineering, or Electrical Engineering (or equivalent experience).
  • 5+ years of proven industry experience.
  • Proven track record developing groundbreaking ASIC design frameworks and flows.
  • Experience with RTL, functional verification, formal verification, or physical design is an asset.
  • High-level programming skills including Python, PERL, Make, and shell scripting.
  • Experience with AI frameworks including knowledge of agentic flow development.
  • Excellent verbal and written communication skills.

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