Senior ASIC Design Engineer - LPU
Nvidia
At a glance
AI generatedAs a senior member of the ASIC development team, you will redefine hardware development methodologies by pioneering AI-driven automation techniques that enhance predictability and efficiency across logic design, verification, and physical design stages. Your daily responsibilities include identifying bottlenecks in the ASIC lifecycle, curating real-time data for AI models, establishing quantitative metrics to measure improvements, and mentoring engineers on emerging technologies. You will also track advancements in AI, EDA, and hardware design research to guide strategic investments aligned with long-term roadmaps. The ideal candidate has a strong background in computer science or electrical engineering, 5+ years of industry experience developing ASIC frameworks, proficiency in Python, Perl, Make, shell scripting, and knowledge of agentic flow development within AI frameworks.
Skills
What you'll do
What we're looking for
Market check
This $152,000–$241,500 range sits above 63% of similar postings on FindRole.
Peer median band
$140,000–$218,500
Median floor and ceiling across peers.
Typical midpoint (25–75%)
$151,106–$216,250
Middle half of comparable postings.
Based on 240 comparable postings.
* 240 is the maximum number of comparable postings sampled.
Employer
Nvidia is a leading designer of graphics processing units (GPUs) and system-on-chip units, powering gaming, professional visualization, data centers, and artificial intelligence workloads. Industry: Semiconductors & AI Computing
Nvidia currently has 801 open roles on FindRole.
Listed pay typically runs $184,000–$287,500 across 797 roles with salary data.
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