RTL Methodology Silicon Design Engineer

Amd

Confirmed live today High trust

Quick summary

Work type
On-site
Location
Austin, TX
Salary
$178,400–$267,600 / yr
Posted
11 days ago
Freshness
Confirmed live today
Closes
Oct 15, 2027
Nearby
99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $200k
This role $223k
$137k $282k
below market most similar roles pay here above market

This role pays more than 68% of similar roles. Most pay $170,869–$229,100 — the blue band above. At the midpoint, this role pays about $223k versus about $200k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 496 open roles on FindRole.

Listed pay typically runs $172,000–$258,000 across 496 roles with salary data.

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At a glance

TL;DR · RTL Methodology Silicon Design Engineer

Role Posting Log in to save

JOB TITLE: RTL Methodology Silicon Design Engineer As an RTL Methodology Engineer, you will join the Core RTL team to build the infrastructure, tooling, and AI-powered capabilities for next-generation CPU cores. You will develop agentic workflows and LLM-based assistants to accelerate RTL design, review, and debugging while owning the static analysis ecosystem, including linting flows, rule authoring, and SystemVerilog/Verilog parsers. Your work involves creating ASTs and custom code-analysis tools to improve engineering productivity. You will utilize technologies such as Verible, Slang, Verilator, and Surelog, alongside programming languages like Python, Go, Java, C#, and TypeScript. You will collaborate with multi-disciplinary teams to solve hardware design problems, focusing on automating manual processes and integrating AI coding assistants into the digital-design workflow to ensure high-quality RTL development.

Skills

RTL Design SystemVerilog Verilog Python Go Java C# TypeScript Perl Ruby Shell TCL LLM RAG Agentic Frameworks Static Analysis Linting Verible Slang Verilator Surelog Synthesis Physical Design Place and Route Timing Closure

What you'll do

  • Execute and refine the methodology and tools required to accomplish RTL design work.
  • Develop AI-powered tools and agentic workflows to accelerate RTL design, review, and debugging.
  • Own and advance the RTL static analysis ecosystem, including linting flows and rule authoring.
  • Identify and prototype high-value opportunities to apply AI across the RTL design flow.
  • Develop best-in-class engineering infrastructure for RTL development with hardware and infrastructure engineers.
  • Maintain critical tools that ensure high-quality RTL development and code quality.
  • Contribute to silicon debug and product support as needed.

What we're looking for

  • Solid understanding of modern CPU architecture.
  • Strong communication and collaboration skills.
  • BS, MS, or PhD degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field (preferred).
  • Verilog/SystemVerilog RTL development within CPU, SoC, ASIC, or related digital-design environments (preferred).
  • RTL linting, static analysis, design methodology, and code-quality tooling (preferred).
  • HDL parsers, ASTs, or source-code analysis and transformation tools such as Verible, Slang, Verilator, or Surelog (preferred).
  • Building applications or engineering tools using large language models, including RAG, agentic frameworks, or prompt engineering (preferred).
  • Strong proficiency with scripting languages such as Python, Perl, Ruby, Shell, and/or TCL (preferred).

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