CPU Micro-Architecture and RTL Design Engineer (RISC-V)

Qualcomm

Confirmed live today Trusted

Quick summary

Work type
On-site
Location
Santa Clara, CAAustin, TX
Salary
$175,600–$263,400 / yr
Posted
25 days ago
Freshness
Confirmed live today
Closes
Mar 31, 2027

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Competitive pay

How this pay compares to similar roles

Similar $206k
This role $220k
$137k $278k
below market most similar roles pay here above market

This role pays more than 64% of similar roles. Most pay $168,425–$244,212 — the blue band above. At the midpoint, this role pays about $220k versus about $206k for comparable roles.

Based on 240 similar postings.

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About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 575 open roles on FindRole.

Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.

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At a glance

TL;DR · CPU Micro-Architecture and RTL Design Engineer (RISC-V)

As a CPU Micro-Architecture and RTL Design Engineer within the CPU Engineering group, you will develop RTL for high-performance, low-power devices using the RISC-V Architecture. You will collaborate with chip architects to conceive micro-architectures, perform performance exploration, and develop detailed specifications. Your daily responsibilities include RTL ownership, where you will develop, assess, and refine designs to meet specific power, performance, area, and timing goals. You will also provide functional and performance verification support and work with multi-functional teams on physical design implementation. Required skills include knowledge of Verilog or VHDL, logic design principles, and scripting languages like Perl or Python. You must understand microprocessor components such as branch prediction, out-of-order execution, and cache subsystems to solve complex hardware design challenges.

What you'll do

  • Explore high-performance strategies in coordination with the CPU modeling team.
  • Develop microarchitecture specifications from high-level exploration through detailed research.
  • Develop, assess, and refine RTL designs to meet power, performance, area, and timing goals.
  • Support the design verification team in executing the functional verification strategy.
  • Verify that the RTL design meets specific performance goals.
  • Implement and validate physical design aspects including timing, area, reliability, and testability.

What we're looking for

  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 4+ years of relevant engineering work experience.
  • Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 3+ years of relevant engineering work experience.
  • PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field and 2+ years of relevant engineering work experience.
  • Thorough knowledge of microprocessor architecture including expertise in areas like branch prediction, out-of-order execution, or cache subsystems (preferred).
  • Knowledge of Verilog and/or VHDL, including experience with simulators and waveform debugging tools (preferred).
  • Knowledge of logic design principles along with timing and power implications (preferred).
  • Understanding of low power microarchitecture techniques (preferred).
  • Experience using a scripting language such as Perl or Python (preferred).

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