CPU Micro-Architecture and RTL Design Engineer (RISC-V)

Qualcomm

Confirmed live 2 days ago Low trust

Quick summary

Work type
On-site
Location
Santa Clara, CAAustin, TX
Salary
$167,100–$250,700 / yr
Posted
43 days ago
Freshness
Confirmed live 2 days ago
Closes
Jan 26, 2027

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $201k
This role $209k
$150k most similar roles pay here $261k

This role pays more than 59% of similar roles. Most pay $175,000–$227,300 — the shaded band above. At the midpoint, this role pays about $209k versus about $201k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 623 open roles on FindRole.

Listed pay typically runs $148,300–$222,500 across 603 roles with salary data.

Most-posted roles

View all roles at Qualcomm

At a glance

TL;DR · CPU Micro-Architecture and RTL Design Engineer (RISC-V)

As a CPU Micro-Architecture and RTL Design Engineer within the CPU Engineering team, you will contribute to the development of high-performance, low-power devices utilizing the RISC-V Architecture. You will collaborate with chip architects to conceive micro-architectures, perform performance exploration, and develop detailed specifications from early architectural research stages. Your daily responsibilities include owning RTL design by refining it for power, performance, area, and timing goals, while providing critical support for both functional and performance verification. The role requires expertise in microprocessor architecture—including branch prediction, out-of-order execution, and memory subsystems—alongside proficiency in Verilog or VHDL, logic design principles, and scripting languages like Perl or Python. You will solve complex hardware challenges by balancing high-performance techniques with low-power microarchitecture requirements to ensure successful physical design delivery for advanced processor systems.

What you'll do

  • Explore high performance strategies in collaboration with the CPU modeling team.
  • Develop microarchitecture specifications from early architectural exploration through detailed research.
  • Own RTL design by developing and refining code to meet power, performance, area, and timing goals.
  • Support the design verification team in executing functional verification strategies.
  • Verify that the RTL design meets established performance targets.
  • Implement and validate physical design aspects including timing, area, reliability, and testability.

What we're looking for

  • Bachelor's degree with 4+ years of experience in engineering or a related field.
  • Master's degree with 3+ years of experience in engineering or a related field.
  • PhD with 2+ years of experience in engineering or a related field.
  • Thorough knowledge of microprocessor architecture including fetch, decode, branch prediction, and memory subsystems.
  • Proficiency in Verilog and/or VHDL with experience using simulators and waveform debugging tools.
  • Knowledge of logic design principles regarding timing and power implications.
  • Understanding of low power and high-performance microarchitecture techniques.
  • Experience using scripting languages such as Perl or Python.

More like this

Similar roles

CPU Micro-architect/RTL Designer

Qualcomm

Austin, TX +1 38 days ago $211,900$317,900
RTL Design Microarchitecture Verilog VHDL Python Perl Logic Design Waveform Debugging Simulators Instruction Fetch and Decode Branch Prediction Out-of-Order Execution
8+ yrs exp

CPU Micro-Architect RTL Engineer

Qualcomm

Austin, TX 87 days ago $98,500$147,700
RTL Design CPU Microarchitecture RISC-V Processor Pipelines Out-of-Order Execution Cache Coherence Memory Hierarchy Multi-threaded Systems Low-Power Optimization
1+ yrs exp

CPU Micro-Architect RTL Engineer

Qualcomm

Austin, TX 126 days ago $154,000$231,000
RTL Design CPU Microarchitecture RISC-V Processor Pipelines Out-of-Order Execution Cache Coherence Memory Hierarchy Multi-threaded Systems Low-Power Optimization
4+ yrs exp

CPU Systems RTL Engineer

Qualcomm

Santa Clara, CA 12 days ago $167,100$250,700
RTL Verilog VHDL Microarchitecture Logic Design Python Perl Waveform Debugging Simulators Power Management Functional Verification Hardware Engineering Firmware
4+ yrs exp

RISCV CPU System RTL Engineer

Qualcomm

Santa Clara, CA +3 12 days ago $142,200$213,400
RISCV RTL Design Verilog VHDL Microarchitecture Logic Design Power Management Python Perl Waveform Debugging Simulators Hardware Engineering System Architecture
2+ yrs exp

CPU Micro-architect/RTL Designer

Qualcomm

Austin, TX +1 12 days ago $148,300$250,700
RTL Verilog VHDL Python Perl Microarchitecture Logic Design Functional Verification Waveform Debugging Instruction Fetch Branch Prediction