R&D Engineer IC Design

Broadcom

Confirmed live today High trust

Quick summary

Work type: On-site
Location: San Jose, CA
Salary: $120,000–$192,000 / yr
Employment: Full-time
Posted: 154 days ago
Freshness: Confirmed live today
Closes: Oct 28, 2026
Nearby: 99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $201k

This role $156k

$104k most similar roles pay here $269k

This role pays less than 82% of similar roles. Most pay $164,313–$238,387 — the shaded band above. At the midpoint, this role pays about $156k versus about $201k for comparable roles.

Based on 240 similar postings.

Employer

About Broadcom

Broadcom is a global semiconductor and infrastructure software company that designs and markets a wide range of networking, storage, and wireless connectivity solutions. Industry: Semiconductors & Infrastructure Software

Broadcom currently has 172 open roles on FindRole.

Listed pay typically runs $121,900–$195,000 across 125 roles with salary data.

Most-posted roles

View all roles at Broadcom

At a glance

TL;DR · R&D Engineer IC Design

Role Posting Log in to save

The R&D Engineer IC Design role focuses on the verification of complex switch designs at both the block and chip levels. The engineer is responsible for creating SystemVerilog-based verification environments, including testbenches, checkers, and transactors, while developing and executing testplans for RTL and gatesim-based designs. Additionally, the position involves creating ATE testing vectors and C-based diagnostic tests to be executed on actual silicon. To succeed in this role, candidates must possess strong programming skills in SystemVerilog and various scripting languages. Preferred qualifications include experience with UVM methodology and a solid understanding of networking and switching concepts. The work centers on solving technical challenges within the semiconductor space by ensuring the reliability of integrated circuit designs through rigorous verification processes and specialized diagnostic testing for hardware components.

Skills

SystemVerilog UVM C RTL ATE Testbenches Networking Switch Design Design Verification

What you'll do

Verify complex switch designs at both the block and chip levels.
Create SystemVerilog-based verification environments including testbenches, checkers, and transactors.
Develop and execute testplans for RTL and gatesim-based designs.
Create ATE testing vectors for hardware validation.
Develop C-based diagnostic tests to be executed on actual silicon.
Utilize UVM methodology to perform design verification.

What we're looking for

Master's Degree in Electrical and Electronic Engineering, Computer Science, or equivalent.
Minimum of 6 years of work experience in Design Verification.
Strong knowledge and hands-on experience in verification methods, tools, and environments.
Strong programming skills in SystemVerilog and scripting languages.
Knowledge and experience in UVM methodology (preferred).
Knowledge of networking and switching concepts (preferred).