PMIC Design Engineer, Staff

Qualcomm

Confirmed live today High trust

Quick summary

Work type: On-site
Location: Tempe, AZ
Salary: $131,000–$196,600 / yr
Posted: 6 days ago
Freshness: Confirmed live today
Closes: Apr 19, 2027
Nearby: 99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $202k

This role $164k

$118k $250k

below market most similar roles pay here above market

This role pays less than 80% of similar roles. Most pay $176,600–$227,350 — the blue band above. At the midpoint, this role pays about $164k versus about $202k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 575 open roles on FindRole.

Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.

Most-posted roles

View all roles at Qualcomm

At a glance

TL;DR · PMIC Design Engineer, Staff

Role Posting Log in to save

The PMIC Design Engineer, Staff joins the PMIC Design team to define, design, verify, and document Mixed Signal and Power Management Integrated Circuits. This role involves determining architectural designs and circuit level implementations based on system requirements, owning design and verification strategies, and collaborating with layout engineers for physical verification. The engineer will utilize CADENCE, SPICE, MATLAB, and Verilog/VHDL to develop solutions involving power electronics, control theory, precision oscillators, high accuracy data converters, analog front ends, high bandwidth linear amplifiers, very low power references, electromigration, transistor reliability, behavioral modeling, and UVI techniques. The work focuses on solving technical challenges for products across the auto, IoT, and cellular business units to achieve next generation connected computing initiatives while ensuring compatibility, safety, manufacturability, and compliance.

Skills

CADENCE SPICE MATLAB Verilog VHDL Power Electronics Control Theory Behavioral Modeling UVI Techniques Physical Verification Transistor Reliability

What you'll do

Define, design, verify, and document critical Mixed Signal and Power Management Integrated Circuits.
Determine architectural designs and circuit-level implementations based on system-level requirements.
Apply advanced knowledge of power electronics, control theory, and transistor reliability to all design aspects.
Own the design and verification strategies for Power Management Integrated Circuits (PMICs).
Use specialized tools and applications to achieve advanced architecture for blocks, modules, or chips.
Collaborate with layout engineers to generate circuit layouts and conduct physical verification.
Document circuit implementation, control, and testability while ensuring safety, manufacturability, and compliance.

What we're looking for

Bachelor's degree in Electrical Engineering with 6+ years of analog, mixed-signal, or PMIC design experience.
Master's degree in Electrical Engineering or related field with 4+ years of analog, mixed-signal, or PMIC design experience.
PhD in Electrical Engineering or related field with 2+ years of analog, mixed-signal, or PMIC design experience.
2+ years of academic and/or work experience using CADENCE, SPICE, MATLAB, and/or Verilog/VHDL.
Master's or PhD in Electrical Engineering (preferred).
6+ years of experience in analog, mixed-signal, or Power Management integrated circuit design (preferred).
6+ years of experience in areas such as Power Electronics, Control Theory, or High Accuracy Data Converters (preferred).
1+ year in a technical leadership role (preferred).

Save