PMIC Reference HW Design Engineer

Qualcomm

Confirmed live today High trust

Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$141,300–$211,900 / yr
Posted
26 days ago
Freshness
Confirmed live today
Closes
Mar 30, 2027

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $196k
This role $177k
$129k $252k
below market most similar roles pay here above market

This role pays less than 69% of similar roles. Most pay $162,000–$229,100 — the blue band above. At the midpoint, this role pays about $177k versus about $196k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 575 open roles on FindRole.

Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.

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At a glance

TL;DR · PMIC Reference HW Design Engineer

The PMIC Reference HW Design Engineer joins the PMIC Systems group to own PCB design guidelines for chipset-based phone designs. This role involves designing and optimizing PMIC PCB floorplans, schematics, layouts, and thermal solutions for test platforms and customer reference kits. You will develop and publish design guidelines, select components for eBOMs, and perform board-level simulations to review hardware designs. Key responsibilities include characterizing performance-optimized reference BOM lists and working with IC designers to optimize cost and performance. Required skills include experience with SMPS, LDO, and battery chargers, along with proficiency in tools like SPICE, MATLAB, Verilog/VHDL, C, and Python. You must be able to operate lab equipment like oscilloscopes and spectrum analyzers while addressing Signal and Power Integrity issues on high layer count multilayer boards.

What you'll do

  • Design customer reference boards and evaluation kits to optimize performance and cost.
  • Develop and publish PMIC PCB design guidelines, schematics, and BOM selections.
  • Perform board-level simulations using Power Integrity and Signal Integrity tools to sign off on hardware designs.
  • Characterize and publish performance-optimized reference BOM lists for power inductors, capacitors, and third-party components.
  • Conduct component characterization and BOM reduction tests in a laboratory environment.
  • Use common lab test equipment like oscilloscopes and spectrum analyzers to validate hardware.
  • Identify and provide solutions for Signal and Power Integrity issues using specialized simulators.

What we're looking for

  • Bachelor's degree in Electrical Engineering and 5+ years of engineering experience, OR Master's and 4+ years, OR PhD and 2+ years.
  • 2+ years of academic or professional experience using IC design tools, PCB design tools, SPICE, MATLAB, Verilog/VHDL, C, or Python.
  • Experience in Power Management (SMPS, LDO, battery chargers, Clocks, ADC) PCB design and component selection including CAD interface.
  • Ability to work with common lab test equipment such as oscilloscopes, spectrum analyzers, and logic analyzers.
  • Experience in high layer count multilayer boards (6/8/10 layers) (preferred).
  • 3+ years of mobile phone or similar product experience in power systems, power grid analysis, or PMIC transistor level design (preferred).
  • 3+ years of experience in areas such as SMPS, LDO, Buck/Boost Converters, or Battery charging (preferred).
  • 1+ year of experience in a large matrixed organization and 1+ year of experience interacting with leadership (preferred).

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