Power Management IC Design

Qualcomm

Confirmed live today High trust

Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$134,500–$201,700 / yr
Posted
40 days ago
Freshness
Confirmed live today
Closes
Mar 16, 2027

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $210k
This role $168k
$119k $279k
below market most similar roles pay here above market

This role pays less than 82% of similar roles. Most pay $177,300–$243,600 — the blue band above. At the midpoint, this role pays about $168k versus about $210k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 575 open roles on FindRole.

Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.

Most-posted roles

View all roles at Qualcomm

At a glance

TL;DR · Power Management IC Design

JOB TITLE: Power Management IC Design The Power Management IC Design role within the PMIC Design team involves overseeing the definition, design, verification, and documentation of mixed-signal integrated circuits. You will determine IC architecture and circuit-level specifications for controller ICs and high-current power stage circuitry tailored for compute, data center, automotive, and industrial applications. Daily responsibilities include architecture implementation, transistor-level circuit design, simulation, and overseeing layout execution, silicon bring-up, and characterization. You will utilize tools such as Cadence ADE, Spectre, MathWorks MATLAB, Verilog/Verilog-AMS, and SystemVerilog. Required expertise includes power electronics, control theory, mixed-signal circuit design, and transistor reliability. You will solve complex power management problems by interpreting simulation results and driving corrective design actions to ensure performance across various operating conditions and product requirements.

What you'll do

  • Execute architecture implementation, circuit design, and verification of complex IC blocks using tools like Cadence ADE and MATLAB.
  • Own the design and verification strategy for power management IC blocks, including controller circuitry and high-current power stage interfaces.
  • Guide layout engineers to generate high-quality layouts and conduct physical and reliability verification of circuits.
  • Run advanced functionality and performance checks to ensure designs meet specifications across PVT and operating conditions.
  • Interpret simulation, silicon characterization, and debug results to drive corrective design actions.
  • Document detailed design intent, architectural decisions, circuit functionality, and silicon findings for PMIC subsystems.
  • Support silicon bring-up, characterization, qualification, and production ramp in coordination with validation and test teams.

What we're looking for

  • Must have a Bachelor's degree in Electrical Engineering with 4+ years of relevant IC Design experience.
  • Must have a Master's degree in Electrical Engineering or a related field with 2+ years of relevant IC Design experience.
  • Must have a PhD in Electrical Engineering or a related field.
  • Must have 2+ years of academic and/or work experience using CADENCE, SPICE, MATLAB, and/or Verilog/VHDL.
  • Must have expertise in power electronics, control theory, mixed-signal circuit design, or high-speed and high-drive circuits.
  • Must be proficient in design tools such as Cadence ADE, Spectre, MathWorks MATLAB, Verilog/Verilog-AMS, and SystemVerilog.
  • Preferred to have 3+ years of experience in analog, mixed-signal, or Power Management IC design with a Master's or PhD.
  • Preferred to have experience in areas such as Multiphase Buck Controllers, High-Accuracy Analog Front Ends, or Behavioral Modeling.

More like this

Similar roles

Staff Engineer, Power Management IC Design

Qualcomm

Santa Clara, CA 40 days ago $159,600–$239,400
Cadence ADE Spectre MATLAB Verilog Verilog‑AMS SystemVerilog Simplis SPICE VHDL Control Theory Behavioral Modeling silicon bring‑up Characterization
6+ yrs exp

Power Management Systems Design and Verification Engineer

Qualcomm

San Diego, CA 32 days ago $99,500–$149,300
PMIC Systems Power Electronics Python MATLAB Mentor Graphics PCB Layout Firmware SMPS LDO Buck Converters Boost Converters Post-silicon Verification Thermal Analysis Power Distribution Networks PWB Design Excel
1+ yrs exp

PMIC Design Engineer, Staff

Qualcomm

Tempe, AZ 6 days ago $131,000–$196,600
CADENCE SPICE MATLAB Verilog VHDL Power Electronics Control Theory Behavioral Modeling UVI Techniques Physical Verification Transistor Reliability
6+ yrs exp

IC Designer, Power Management

Apple Inc

Austin, TX 83 days ago
Analog IC Design DC-DC Converters LDOs Buck Boost Mixed Signal Transistor-level Design Layout Matlab VerilogA Python C Spectrum Analyzers Oscilloscopes Signal Generators ESD Compliance CAD Tools
10+ yrs exp

IC Designer, Power Management

Apple Inc

Sunnyvale, CA 83 days ago $175,500–$311,700
Analog IC Design DC-DC Converters Buck Boost Mixed Signal Transistor-level Design VerilogA Python Matlab C CAD Tools Oscilloscope Spectrum Analyzer Signal Generator ESD Compliance Layout Simulation
10+ yrs exp

Analog Design Lead, Power Management

Apple Inc

San Diego, CA 76 days ago $166,600–$296,000
Power Management DC/DC Converters Buck Boost Buck-Boost Charge Pumps LDOs MATLAB Simplis PSIM Spectre Mixed Signal ICs LVS LVL ATE Lab Correlation Semiconductor Device Physics Layout Extraction Failure Analysis