SOC Design Verification Engineer-Staff
Qualcomm
Quick summary
Market check
How this pay compares to similar roles
This role pays less than 65% of similar roles. Most pay $176,600–$239,850 — the blue band above. At the midpoint, this role pays about $182k versus about $208k for comparable roles.
Based on 240 similar postings.
Employer
Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.
Qualcomm currently has 575 open roles on FindRole.
Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.
Most-posted roles
At a glance
The Physical Design Engineer, Staff joins the ASICS Engineering group to define, model, design, optimize, verify, validate, implement, and document IP development for high performance, high quality, and low power products. This role involves creating advanced architectures, circuit specifications, logic designs, and system simulations based on system-level requirements. You will collaborate across functional teams to execute implementation strategies while evaluating complex process flows from high-level design to synthesis, place and route, timing, and power use. Key technical requirements include proficiency with RTL to GDS Flow and Virtuoso tools, as well as experience with scripting tools, programming languages, and design verification methods. You will solve complex technical problems by managing the full lifecycle of multiple complex blocks, SoCs, or IC Packages.
What does a Physical Design Engineer earn?
Median $177300 from 31 postings across 9 companies.
Skills
What you'll do
What we're looking for
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