Senior Staff RFIC Design Engineer

Qualcomm

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$133,900–$200,900 / yr
Posted
40 days ago
Freshness
Confirmed live yesterday
Closes
Mar 16, 2027

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $192k
This role $167k
$122k $242k
below market most similar roles pay here above market

This role pays less than 70% of similar roles. Most pay $159,500–$225,300 — the blue band above. At the midpoint, this role pays about $167k versus about $192k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 575 open roles on FindRole.

Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.

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View all roles at Qualcomm

At a glance

TL;DR · Senior Staff RFIC Design Engineer

The Sr/Staff RFIC Design Engineer joins the RFIC Design team to define, design, and develop complex radio frequency integrated circuits within complex SoCs and discrete RFICs. The role involves performing radio signal path and circuit topology analysis alongside detailed transistor-level design for highly-integrated transceivers and associated blocks. Key responsibilities include contributing to block architecture, running performance simulations, floor-planning layouts, and writing test plans to identify bugs. The position requires proficiency in CADENCE, Virtuoso, and ADS, as well as utilizing Neural Networks for circuit optimization. Candidates must apply engineering and mathematical principles to solve problems for 4G, 5G, 6G, WLAN, BT, and GPS standards. This work focuses on developing high-performance RF frequency synthesizers and receiver or transmitter circuits using advanced process technologies.

What you'll do

  • Design and develop complex radio frequency integrated circuits for 4G, 5G, 6G, and WLAN standards.
  • Perform radio signal path analysis and transistor-level design for highly-integrated transceivers.
  • Run simulations to determine circuit performance under various operating circumstances.
  • Assist in floor-plan layout and conduct physical verification of circuit layouts.
  • Write test plans and review results to identify bugs and assess performance.
  • Debug technical issues and escalate complex problems to senior team members.
  • Use Neural Networks for circuit optimization and analysis.
  • Write technical documentation and feature descriptions for small projects.

What we're looking for

  • Bachelor's degree in Electrical Engineering with 3+ years of RF/Analog circuit design experience and 2+ years of ASIC design experience.
  • Master's degree in Electrical Engineering or related field with 2+ years of ASIC design, verification, or related work experience.
  • PhD in Electrical Engineering or related field.
  • 2+ years of academic or professional experience using two or more of the following software: CADENCE, Virtuoso, ADS.
  • 3+ years experience in transistor level design of RF analog integrated circuits with a Master's degree in Electrical Engineering (preferred).
  • 2+ years of experience in receiver/transmitter RF/Analog circuits, high-performance RF frequency synthesizers, digital control, or EM simulation (preferred).
  • 1+ year of experience working in a large matrixed organization (preferred).

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