Physical IC Design Engineer

Broadcom

Confirmed live yesterday Trusted

Quick summary

Work type
On-site
Location
San Jose, CA
Salary
$143,800–$230,000 / yr
Posted
84 days ago
Freshness
Confirmed live yesterday
Closes
Dec 16, 2026
Nearby
99+ roles within 25 mi

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $192k
This role $187k
$133k most similar roles pay here $240k

This role pays more than 50% of similar roles. Most pay $162,000–$222,250 — the shaded band above. At the midpoint, this role pays about $187k versus about $192k for comparable roles.

Based on 240 similar postings.

Employer

About Broadcom

Broadcom is a global semiconductor and infrastructure software company that designs and markets a wide range of networking, storage, and wireless connectivity solutions. Industry: Semiconductors & Infrastructure Software

Broadcom currently has 119 open roles on FindRole.

Listed pay typically runs $121,900–$195,000 across 105 roles with salary data.

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View all roles at Broadcom

At a glance

TL;DR · Physical IC Design Engineer

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The Physical IC Design Engineer joins the Asic Products Division to support the development of PCIe Switch Products for Artificial Intelligence, Machine Learning ecosystems, and Enterprise Storage Products. This role involves managing the full physical design cycle from RTL to silicon tape-out. Key responsibilities include executing synthesis, physical verification, and timing closure through various strategies, as well as performing EM/IR analysis, place and route, clock tree synthesis, floor-planning, and layout flow methodology development. The successful candidate will collaborate with IC Design RTL Engineers to solve complex hardware challenges. Required technical skills include proficiency in TCL and PERL scripting along with expertise in related EDA tools. Candidates must possess a Bachelor’s degree in Electrical Engineering or Electronics Engineering and have over twelve years of relevant experience in the physical design cycle for semiconductor products.

Skills

Physical Design RTL to Tape-out Synthesis Timing Closure EM/IR Analysis Place and Route Clock Tree Synthesis Floor-planning Layout TCL Perl EDA Tools ASIC Machine Learning PCIe

What you'll do

  • Execute the full physical design cycle from RTL to silicon tape-out.
  • Perform synthesis, physical verification, and timing closure using various methods and strategies.
  • Conduct EM/IR analysis for integrated circuit designs.
  • Manage place and route processes and clock tree synthesis.
  • Develop floor-planning, layout flows, and overall methodology.
  • Utilize TCL and PERL scripting to automate and manage EDA tools.

What we're looking for

  • Bachelor's degree in Electrical Engineering or Electronics Engineering.
  • 12+ years of relevant experience.
  • Expertise in all Physical Design aspects from RTL to silicon tape-out.
  • Proficiency in TCL and PERL scripting.
  • Proficiency in related EDA tools.
  • Experience with Synthesis, Physical Verification, and Timing Closure.
  • Experience with EM/IR Analysis, Place and Route, Clock Tree Synthesis, and Floor-planning.
  • Excellent verbal and written communication skills.

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