Physical IC Design Engineer

Broadcom

Quick summary

Work type
On-site
Location
San Jose, CA
Salary
$121,900–$195,000 / yr
Posted
9 days ago
Closes
Dec 16, 2026

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $183k
This role $158k
$110k most similar roles pay here $233k

This role pays less than 73% of similar roles. Most pay $153,100–$213,375 — the shaded band above. At the midpoint, this role pays about $158k versus about $183k for comparable roles.

Based on 240 similar postings.

Employer

About Broadcom

Broadcom is a global semiconductor and infrastructure software company that designs and markets a wide range of networking, storage, and wireless connectivity solutions. Industry: Semiconductors & Infrastructure Software

Broadcom currently has 98 open roles on FindRole.

Listed pay typically runs $120,000–$192,000 across 95 roles with salary data.

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View all roles at Broadcom

At a glance

TL;DR · Physical IC Design Engineer

Broadcom seeks a Physical IC Design Engineer to join its Asic Products Division in San Jose, focusing on advancing AI and ML ecosystems through PCIe Switch Products and enhancing enterprise storage performance. This role involves executing physical design tasks such as synthesis, verification, timing closure, EM/IR analysis, place and route, clock tree synthesis, floor-planning, and layout development. The engineer will collaborate closely with RTL engineers to develop methodologies and flows for the full physical design cycle from RTL to tape-out. Essential skills include TCL/Perl scripting, proficiency in EDA tools, and strong communication abilities. Ideal candidates have a Bachelor’s degree in Electrical or Electronics Engineering and at least 8 years of relevant experience.

What you'll do

  • Execute physical design, synthesis, verification, and timing closure for RTL to silicon tape-out.
  • Perform EM/IR analysis and clock tree synthesis in the design process.
  • Develop flow and methodology for efficient physical design cycles.
  • Collaborate with IC Design RTL Engineers on complex projects.
  • Conduct place and route operations to ensure optimal chip performance.

What we're looking for

  • At least 8 years of experience in Physical IC Design from RTL to tape-out.
  • Proficiency in TCL/PERL scripting and relevant EDA tools.
  • Expertise in physical design aspects including synthesis, verification, and timing closure.
  • Strong skills in EM/IR analysis, place and route, and clock tree synthesis.
  • Experience in floor-planning, layout, and flow/methodology development.
  • Ability to collaborate effectively with IC Design RTL Engineers.
  • Bachelor’s degree required in Electrical or Electronics Engineering.

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