Packaging SIPI Engineer, Principal Engineer

Qualcomm

Confirmed live yesterday High trust

Quick summary

Work type: On-site
Location: San Diego, CA
Salary: $210,000–$315,000 / yr
Posted: 40 days ago
Freshness: Confirmed live yesterday
Closes: Mar 16, 2027
Nearby: 99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $206k

This role $262k

$139k $334k

below market most similar roles pay here above market

This role pays more than 85% of similar roles. Most pay $172,000–$240,150 — the blue band above. At the midpoint, this role pays about $262k versus about $206k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 575 open roles on FindRole.

Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.

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At a glance

TL;DR · Packaging SIPI Engineer, Principal Engineer

Role Posting Log in to save

The Packaging SIPI Engineer, Principal Engineer joins the Packaging Engineering group to perform signal and power integrity tasks in a collaborative environment. This role involves partnering with package, platform, and IC designers to optimize designs for high-speed computing and server projects. Key responsibilities include electrical model extraction, performing IO analysis for various serial interfaces, and conducting power distribution analysis for product development and reference systems. The candidate will perform package extraction for time- and frequency-domain analysis and provide design guidelines while documenting results clearly. Required technical skills include proficiency with field solvers like HFSS, Q3D, Sentinel-PSI, and Clarity, alongside SPICE transient simulation tools such as ADS and HSPICE. Experience with PCIe, USB, UFS, and MIPI specifications, as well as MATLAB, C/C++, and Python, is also required.

Skills

Power Integrity SerDes HFSS Q3D Sentinel-PSI Clarity ADS HSPICE IBIS IBIS-AMI MATLAB C++ Python Perl PCIe USB UFS MIPI Electromagnetics Transmission Line Theory

What you'll do

Perform signal and power integrity simulations to optimize package and system designs.
Execute electrical model extraction for high-speed SerDes and system-level projects.
Conduct IO analysis using established methodologies for various serial interfaces.
Analyze IO power distribution for product development and reference systems.
Perform package extraction for time- and frequency-domain analysis.
Provide technical package design guidelines based on simulation results.
Document and report simulation results clearly and thoroughly.

What we're looking for

Bachelor's degree in Chemical, Electrical, or Mechanical Engineering and 8+ years of System/Package Design/Technology Engineering experience.
Master's degree in Chemical, Electrical, or Mechanical Engineering and 7+ years of System/Package Design/Technology Engineering experience.
PhD in Chemical, Electrical, or Mechanical Engineering and 6+ years of System/Package Design/Technology Engineering experience.
10+ years of experience with high-speed SerDes package, PCB, or system design for computing/server standards (preferred).
Strong background in electromagnetics, transmission line theory, and crosstalk (preferred).
Proficiency with field solvers (HFSS, Q3D, Sentinel-PSI, Clarity) and SPICE transient simulation tools (ADS, HSPICE) (preferred).
Experience with SerDes specifications such as PCIe, USB, UFS, and MIPI (preferred).
Experience with MATLAB, C/C++, Perl, or Python (preferred).

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