Packaging SIPI Engineer, Principal Engineer

Qualcomm

Confirmed live 2 days ago High trust

Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$201,600–$302,400 / yr
Posted
8 days ago
Freshness
Confirmed live 2 days ago
Closes
Mar 2, 2027
Nearby
99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $178k
This role $252k
$116k most similar roles pay here $322k

This role pays more than 92% of similar roles. Most pay $150,574–$204,437 — the shaded band above. At the midpoint, this role pays about $252k versus about $178k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 623 open roles on FindRole.

Listed pay typically runs $148,300–$222,500 across 603 roles with salary data.

Most-posted roles

View all roles at Qualcomm

At a glance

TL;DR · Packaging SIPI Engineer, Principal Engineer

Role Posting Log in to save

The Packaging SIPI Engineer, Principal Engineer works within a collaborative engineering environment to perform signal and power integrity tasks while partnering with package, platform, and IC designers to optimize system designs. The role involves performing electrical model extraction, conducting signal and power integrity simulations, and providing clear reporting of results for high-speed SerDes projects in the computing and server space. Day-to-day responsibilities include IO analysis for various serial interfaces, analyzing power distribution for reference systems, and providing package design guidelines through time- and frequency-domain analysis. The candidate will utilize field solvers such as HFSS, Q3D, Sentinel-PSI, and Clarity, alongside SPICE transient simulation tools like ADS and HSPICE using IBIS and IBIS-AMI models. Technical expertise includes electromagnetics, transmission line theory, MATLAB for automation, and programming in C/C++, Perl, or Python.

Skills

Power Integrity SerDes HFSS Q3D Sentinel-PSI Clarity ADS HSPICE IBIS IBIS-AMI MATLAB C++ Python Perl PCIe USB UFS MIPI

What you'll do

  • Perform signal and power integrity simulations for package and system designs.
  • Execute electrical model extraction for high-speed SerDes components.
  • Conduct IO analysis using established methodologies for various serial interfaces.
  • Analyze power distribution for product development and reference systems.
  • Perform package extraction for time- and frequency-domain analysis.
  • Provide technical design guidelines based on simulation results.
  • Document all technical findings and results clearly and thoroughly.

What we're looking for

  • Bachelor's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or a related field with 8+ years of experience.
  • Master's degree in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or a related field with 7+ years of experience.
  • PhD in Chemical Engineering, Electrical Engineering, Mechanical Engineering, or a related field with 6+ years of experience.
  • 10+ years of experience with high-speed SerDes package, PCB, or system design for computing/server standards.
  • Strong background in electromagnetics, transmission line theory, and crosstalk.
  • Proficiency with field solvers (HFSS, Q3D, Sentinel-PSI, Clarity) and SPICE transient simulation tools (ADS, HSPICE).
  • Experience with SerDes specifications such as PCIe, USB, UFS, and MIPI.
  • Ability to use MATLAB for automation and knowledge of C/C++, Perl, or Python.

Related searches

More Packaging SIPI Engineer jobs Packaging SIPI Engineer jobs in San Diego All jobs at Qualcomm

More like this

Similar roles

Senior Staff Packaging SIPI Engineer

Qualcomm

San Diego, CA 56 days ago $180,400–$270,600
Signal Integrity Power Integrity SerDes PCIe LPDDR UFS USB MIPI Matlab C++ Python Perl HFSS Q3D Sentinel-PSI Clarity ADS Hspice Cadence Allegro Mentor Xpedition
6+ yrs exp
Save

Principal Engineer, Signal and Power Integrity

Qualcomm

San Diego, CA 22 days ago $201,600–$302,400
Power Integrity HFSS Q3D Sentinel-PSI Clarity ADS Hspice IBIS IBIS AMI Matlab Python C++ Perl DDR LPDDR Multi-physics Simulation Transmission Line Theory
8+ yrs exp
Save

Senior HSIO Bench Test Engineer

Qualcomm

San Diego, CA 71 days ago $111,300–$166,900
SERDES PCIe USB4 UFS DP MIPI Signal Integrity Power Integrity Python C# Oscilloscopes J-BERT VLSI CMOS ASIC Test Automation Board Design
2+ yrs exp
Save

Signal Integrity Architect

Qualcomm

Remote (Santa Clara, CA) +5 57 days ago $220,200–$330,400
Signal Integrity CXL 2.0/3.0 PCIe Gen5+ SerDes S-parameters ANSYS HFSS Cadence Sigrity Dassault Systèmes CST Keysight ADS Synopsys' HSPICE Unix Linux MATLAB Python Perl Cadence Allegro Oscilloscope TDR PCB Design 2.5D/3D Packaging
8+ yrs exp Remote
Save

System Signal/Power Integrity Engineer

Broadcom

San Jose, CA +1 25 days ago
Signal Integrity Power Integrity Ansys HFSS Keysight ADS SI-Wave Q3D Polar Matlab VNA TDR SerDes PCB Design IC Package Design electromagnetic-field theory Transmission Line Theory Linux
10+ yrs exp
Save

Principal Packaging Engineer

Medtronic

Rice Creek, MN +1 9 days ago $124,000–$186,000
IQ OQ PQ ASTM International Technical Documentation Project Management
7+ yrs exp Hybrid
Save