SOC Design Verification Engineer
Qualcomm
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How this pay compares to similar roles
This role pays less than 88% of similar roles. Most pay $158,037–$227,300 — the blue band above. At the midpoint, this role pays about $127k versus about $193k for comparable roles.
Based on 240 similar postings.
Employer
Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.
Qualcomm currently has 575 open roles on FindRole.
Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.
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At a glance
The DFT Engineer joins the ASICS Engineering group to support the development of high performance, high quality, and low power products. This role involves defining, modeling, designing, optimizing, verifying, validating, implementing, and documenting IP development for blocks and SoCs. The engineer will assist in creating architectures, circuit specifications, logic designs, and system simulations based on system-level requirements. Key responsibilities include evaluating process flows from high-level design to synthesis, place and route, and timing and power use. The position requires proficiency with architecture and design tools, scripting tools, programming languages, and design verification methods. Candidates will utilize specific applications such as RTL to GDS Flow and Virtuoso to execute designs for IC packages while producing technical documentation for EDA, IP, and ASIC projects.
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