Staff Modem Hardware Design Verification Engineer

Qualcomm

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Boxborough, MA
Salary
$155,000–$232,600 / yr
Posted
10 days ago
Freshness
Confirmed live yesterday
Closes
Feb 28, 2027

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $184k
This role $194k
$129k most similar roles pay here $244k

This role pays more than 66% of similar roles. Most pay $158,437–$209,800 — the shaded band above. At the midpoint, this role pays about $194k versus about $184k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 623 open roles on FindRole.

Listed pay typically runs $148,300–$222,500 across 603 roles with salary data.

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At a glance

TL;DR · Staff Modem Hardware Design Verification Engineer

The Modem Hardware Design Verification Engineer – AI Driven Next Gen Modem Hardware Development, Staff joins the advanced verification organization to focus on next-generation modem hardware development and AI-driven verification methodologies. This role involves defining and executing verification plans, building reusable environments, and applying advanced techniques to validate complex wireless baseband and subsystem designs for high-performance products. The engineer will integrate cutting-edge GenAI, ML-assisted flows, and agentic-AI automation frameworks to improve debug efficiency and coverage closure. Key technical requirements include expertise in SystemVerilog with UVM/OVM, Verilog, VHDL, C/C++, SystemC, and scripting in Python or Perl. Candidates should possess skills in formal verification, simulation acceleration, and HW/SW co-verification while applying these tools to wireless modem technology, DSP, and 3GPP physical layer standards to solve complex communication system challenges within the mobile hardware domain.

What you'll do

  • Define and execute verification plans for complex wireless baseband and subsystem designs.
  • Build reusable verification environments using SystemVerilog and UVM/OVM methodologies.
  • Implement constrained-random verification to achieve functional, code, and assertion coverage.
  • Integrate Generative AI and ML-based automation to accelerate coverage closure and debug efficiency.
  • Develop automated test generation and regression optimization flows using agentic-AI frameworks.
  • Perform hardware/software co-verification for high-performance modem products.
  • Utilize Python, Perl, and Unix shell scripting to automate verification workflows.
  • Validate designs against 4G/5G 3GPP physical layer standards.

What we're looking for

  • Bachelor's degree in Computer Engineering, Computer Science, Electrical Engineering, or a related field.
  • Master's degree and 3+ years of experience in engineering or a related field.
  • PhD and 2+ years of experience in engineering or a related field.
  • Bachelor's degree and 4+ years of experience in engineering or a related field.
  • Expertise in verification planning, testbench architecture, assertions, debugging, and problem solving.
  • Hands-on constrained-random verification using SystemVerilog with UVM/OVM.
  • Proficiency in Verilog/VHDL, C/C++, SystemC, and scripting languages like Python or Perl.
  • Experience with Generative AI, ML, or agentic-AI-based verification automation.

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