Modem Hardware Design Verification Engineer, AI Driven Next Gen Modem Hardware Development, Staff

Qualcomm

Confirmed live today High trust

Quick summary

Work type: On-site
Location: Boxborough, MA
Salary: $162,500–$243,700 / yr
Posted: 40 days ago
Freshness: Confirmed live today
Closes: Mar 16, 2027
Nearby: 99+ roles within 25 mi

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Similar $199k

This role $203k

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This role pays more than 59% of similar roles. Most pay $168,500–$229,100 — the blue band above. At the midpoint, this role pays about $203k versus about $199k for comparable roles.

Based on 240 similar postings.

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About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 575 open roles on FindRole.

Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.

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At a glance

TL;DR · Modem Hardware Design Verification Engineer, AI Driven Next Gen Modem Hardware Development, Staff

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The Modem Hardware Design Verification Engineer – AI Driven Next Gen Modem Hardware Development, Staff joins the Modem Technologies engineering group to support advanced verification for next-generation modem hardware. This role involves defining verification plans, building reusable environments, and applying advanced techniques to validate complex wireless baseband and subsystem designs. The engineer will utilize GenAI, ML-assisted flows, and agentic-AI automation frameworks to accelerate coverage closure and improve debug efficiency. Key technical requirements include expertise in SystemVerilog with UVM/OVM, Verilog/VHDL, C/C++, SystemC, and scripting in Python or Perl. Candidates must demonstrate skills in constrained-random verification, assertions, and simulation acceleration. The work focuses on solving hardware verification challenges within wireless modem technology, DSP, and communication systems, specifically addressing 4G/5G 3GPP physical layer standards.

Skills

SystemVerilog UVM OVM Python C++ Verilog VHDL SystemC Perl Linux Unix Formal Verification DSP 3GPP ML GenAI Makefiles XML RTL Design

What you'll do

Define and execute comprehensive verification plans for complex wireless baseband and subsystem designs.
Build reusable verification environments using SystemVerilog with UVM/OVM methodologies.
Implement constrained-random verification to achieve functional, code, and assertion coverage.
Apply GenAI, ML, and agentic-AI automation frameworks to accelerate coverage closure and debug efficiency.
Perform HW/SW co-verification and simulation acceleration for high-performance modem products.
Develop scripts in Python, Perl, or C++ to automate verification flows and regression optimization.
Validate modem hardware against 4G/5G 3GPP physical layer standards.

What we're looking for

Bachelor's degree in a related field and 4+ years of relevant engineering experience.
Master's degree in a related field and 3+ years of relevant engineering experience.
PhD in a related field and 2+ years of relevant engineering experience.
Strong expertise in verification planning, testbench architecture, assertions, debugging, and problem solving.
Hands-on constrained-random verification using SystemVerilog with UVM/OVM, including functional/code/assertion coverage.
Solid understanding of Verilog/VHDL, C/C++, SystemC, and scripting (Python/Perl).
Experience with Generative AI, ML, or agentic-AI-based verification automation (preferred).
Background in wireless/wireline modem technology, DSP, or communication systems (preferred).

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