Design Verification Engineer
Apple Inc
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Market check
How this pay compares to similar roles
This role pays more than 67% of similar roles. Most pay $168,500–$229,100 — the blue band above. At the midpoint, this role pays about $216k versus about $199k for comparable roles.
Based on 240 similar postings.
Employer
Snap Inc. is a technology and camera company, best known for Snapchat, offering visual communication, augmented reality, and advertising products.
Snap Inc. currently has 94 open roles on FindRole.
Listed pay typically runs $209,000–$313,000 across 84 roles with salary data.
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At a glance
JOB TITLE: Integrated Circuit Design Verification Engineer The Integrated Circuit Design Verification Engineer joins the Spectacles Team to support a multi-disciplinary group designing display Integrated Circuits for AR. The role involves developing and implementing UVM-based and assertion-based testbenches, creating verification test plans, and executing functional and code coverage. The engineer will utilize the Siemens Questa tool set for verification and debug tasks while specifying and configuring tools and creating automation. Key technical requirements include strong knowledge of SystemVerilog, UVM, and Verilog RTL coding practices. Candidates must be proficient in scripting and automation using TCL, Make, Perl, Python, and Shell scripts in a Linux environment. The work focuses on the technical challenges of developing hardware for advanced eyewear that integrates digital experiences into three-dimensional space.
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