Quick summary
- Work type
- On-site
- Location
- Santa Clara, CA
- Salary
- $184,700–$324,800 / yr
- Posted
- 15 days ago
- Freshness
- Confirmed live today
- Nearby
- 99+ roles within 25 mi
Market check
Salary context
Above market
How this pay compares to similar roles
Similar $207k
This role $255k
$129k
most similar roles pay here
$346k
This role pays more than 95% of similar roles. Most pay $177,300–$235,750 — the shaded band above. At the midpoint, this role pays about $255k versus about $207k for comparable roles.
Based on 240 similar postings.
Employer
About Apple Inc
Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software
Apple Inc currently has 3513 open roles on FindRole.
Listed pay typically runs $165,800–$277,600 across 2730 roles with salary data.
Most-posted roles
- Software Engineer 287
- Machine Learning Engineer 126
- Engineering Program Manager 64
- Design Verification Engineer 49
- SoC Physical Design Engineer 43
At a glance
TL;DR · Graphics FE Implementation Engineer
The Graphics FE Implementation Engineer joins the GPU FE Implementation team to optimize and deliver world-class GPUs into Apple Silicon. This role involves collaborating with RTL and physical design teams to perform synthesis, analysis, and optimization of delivered IP. The engineer will develop advanced techniques across RTL, Synthesis, and PNR to meet demanding timing, power, and area targets while partnering with STA and DFT teams for successful first silicon. Key responsibilities include driving block level synthesis, improving RTL design, debugging complex logic equivalence issues, and implementing ECOs for functionality and timing. Required skills include proficiency in Python, Tcl, or Perl for ASIC flow scripting, along with experience in multi-clock/power domains and linting tools. The role focuses on the technical challenge of delivering high-performance GPU architecture for consumer products.
Skills
What you'll do
- Perform synthesis and optimization of delivered IP to meet timing, power, and area targets.
- Improve RTL design for optimal performance across the physical design flow.
- Debug complex logic equivalence issues and perform netlist checks to validate functionality.
- Implement ECOs to resolve functionality and timing issues during the design process.
- Manage multi-clock, multi-power, and reset domains using UPF and linting tools.
- Develop and execute scripts in Python, Tcl, or Perl for ASIC flows and data manipulation.
- Analyze architectural critical paths to drive multi-block closure across RTL and physical design teams.
- Collaborate with STA and DFT partners to ensure successful first silicon results.
What we're looking for
- Bachelor of Science degree and 10 years of relevant experience.
- Experience driving block level synthesis and optimizations.
- Experience with RTL design improvement for optimal Area, Timing, and Power.
- Experience debugging complex logic equivalence issues and in netlist checks to validate functionality and quality.
- Experience implementing ECOs for functionality and timing.
- Experience with one or more of: reset domain, multi-clock domain, multi-power domain (UPF), and linting tools across RTL and Gate-Level.
- Scripting experience in ASIC flows using Python, Tcl, Perl, or data manipulation.
- Collaboration on physical concepts, DFT familiarity, and GPU/CPU experience are preferred.
More like this
Similar roles
Graphics FE Implementation Engineer
Apple Inc
Austin, TX
15 days ago
Verilog
System Verilog
Physical Synthesis
PPA Optimization
Static Timing Analysis
STA
DFT
UPF
RTL
Gate-level Design
Logic Equivalence
Linting Tools
Multi-clock Domain
Multi-power Domain
3+ yrs exp
Graphics FE Implementation Engineer
Apple Inc
Santa Clara, CA
15 days ago
$129,300–$194,700
RTL
System Verilog
Verilog
Python
Tcl
Perl
Synthesis
Static Timing Analysis
DFT
CDC
ECO
CMOS VLSI
Digital Logic Design
Netlist Generation
Place and Route