Graphics FE Implementation Engineer

Apple Inc

Confirmed live today High trust

Quick summary

Work type
On-site
Location
—
Posted
15 days ago
Freshness
Confirmed live today

Market check

Salary context

How this pay compares to similar roles

Similar $207k
$137k most similar roles pay here $277k

This listing doesn't post a salary. Most similar roles pay $177,300–$236,487.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3513 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2730 roles with salary data.

Most-posted roles

View all roles at Apple Inc

At a glance

TL;DR · Graphics FE Implementation Engineer

As a Graphics FE Implementation Engineer, you will join the GPU FE Implementation team to optimize and deliver world-class GPUs into Apple Silicon. You will be responsible for RTL to netlist generation while collaborating closely with both the RTL and Physical design teams. Your daily responsibilities include delivering key netlist quality milestones for your partition, engaging in Lint, CDC, and Logic equivalence checks, and supporting ECO generation activities. To succeed in this role, you should possess skills in Python, Perl, or Tcl scripting, along with familiarity with Verilog and System Verilog. You will also utilize industry standard rtl2gds tools for synthesis, place and route, and static timing analysis while applying knowledge of Clock/Reset domain crossing, Voltage crossing principles, DFT methodologies, and CMOS device characteristics for area, timing, and power tradeoffs.

More like this

Similar roles

Graphics FE Implementation Engineer

Apple Inc

Santa Clara, CA 15 days ago $129,300–$194,700
RTL System Verilog Verilog Python Tcl Perl Synthesis Static Timing Analysis DFT CDC ECO CMOS VLSI Digital Logic Design Netlist Generation Place and Route

Graphics FE Implementation Engineer

Apple Inc

Austin, TX 15 days ago
Verilog System Verilog Physical Synthesis PPA Optimization Static Timing Analysis STA DFT UPF RTL Gate-level Design Logic Equivalence Linting Tools Multi-clock Domain Multi-power Domain
3+ yrs exp

Graphics FE Implementation Engineer

Apple Inc

Santa Clara, CA 15 days ago $184,700–$324,800
RTL Synthesis Physical Design STA DFT UPF Python Tcl Perl Netlist Floor-planning Timing Analysis Logic Equivalence ASIC Flow
10+ yrs exp