Graphics FE Integration Engineer

Apple Inc

Confirmed live today High trust

Quick summary

Work type
On-site
Location
—
Salary
$184,700–$324,800 / yr
Posted
15 days ago
Freshness
Confirmed live today

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $197k
This role $255k
$129k most similar roles pay here $346k

This role pays more than 95% of similar roles. Most pay $162,000–$231,037 — the shaded band above. At the midpoint, this role pays about $255k versus about $197k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3513 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2730 roles with salary data.

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At a glance

TL;DR · Graphics FE Integration Engineer

As a Graphics FE Integration Engineer within the Silicon Technologies group, you will join the GPU FE Design integration team to develop high-performance, power-efficient GPU technology. Your daily responsibilities include performing RTL integration, assembly, partitioning, and transformation while ensuring implementation readiness through linting, custom checks, unit level synthesis, and clock/reset/power domain crossing checks. You will also debug simulation failures, triage logic equivalence issues, author design integration specifications, and collaborate with cross-functional teams including Architecture, IP, DV, SOC, DFT, and IMPL. The role requires proficiency in Verilog and SystemVerilog, along with experience in scripting languages like Perl, Ruby, or Python. You will work on complex technical problems involving PPA optimization, UPF/CPF power intent, and CDC/RDC to solve front-end design integration challenges for next-generation GPU hardware.

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Graphics FE Integration Engineer

Apple Inc

Austin, TX 15 days ago
Verilog System Verilog Python Perl Ruby RTL DFT UPF CPF CDC RDC STA Synthesis Invio LEC Genus Lint Simulation PPA Optimization SIMD Architecture
10+ yrs exp