GPU Top RTL Designer

Apple Inc

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Work type
On-site
Location
Austin, TX
Posted
17 days ago
Freshness
Confirmed live today
Nearby
99+ roles within 25 mi

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Similar $216k
$150k most similar roles pay here $280k

This listing doesn't post a salary. Most similar roles pay $182,000–$250,000.

Based on 240 similar postings.

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3587 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2768 roles with salary data.

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TL;DR · GPU Top RTL Designer

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As a GPU Top RTL Designer within the Silicon Technologies group, you will join the mobile GPU design team to develop and manufacture next-generation, high-performance, power-efficient processors and system-on-chip logic. You will be responsible for developing microarchitecture from high-level descriptions, delivering high-quality RTL to physical design teams, and specifying clock, power, and interface requirements to optimize performance. Your daily work involves integrating IP from various teams to ensure complete security, debug, and power management solutions while closing timing, power, area, and lint constraints. You will utilize Verilog or SystemVerilog, manage CDC, RDC, and UPF collateral, and potentially use scripting languages for automation. The role focuses on solving complex hardware challenges in the mobile GPU space, specifically addressing the technical requirements of power management and SoC interface logic within a high-performance computing environment.

Skills

RTL Verilog System Verilog SoC GPU Timing Analysis Floor-planning Power Intent UPF CDC RDC Scripting Languages Simulation Debug Power Management

What you'll do

  • Develop and document microarchitecture based on high-level architectural descriptions.
  • Deliver high-quality RTL and design collateral to Physical Design teams.
  • Specify clock, power, and interface descriptions to ensure optimized hardware designs.
  • Assess and integrate applicable IP from various internal teams for security and power management.
  • Close timing, power, area, and lint requirements by optimizing RTL and constraints.
  • Drive performance, power, area, and functional goals for GPU and SoC logic.
  • Manage project milestones and provide delivery schedules to management and IP teams.

What we're looking for

  • Bachelor's degree and 10 years of relevant experience.
  • Experience in logic optimization, synthesis, timing analysis, floor-planning, power intent descriptions, and clock domain crossings.
  • Experience with logic simulation and debug.
  • Experience in power management with CPUs, GPUs, or SoCs.
  • Ability to write one or more scripting languages (preferred).
  • Experience in Graphics hardware design (preferred).
  • Ability to write RTL in Verilog and/or SystemVerilog that meets timing, power, and performance goals (preferred).
  • Expertise in CDC, RDC, and UPF collateral; leadership experience driving project milestones (preferred).

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