GPU Design Engineer, Memory Hierarchy

Apple Inc

Confirmed live yesterday High trust

Quick summary

Work type: On-site
Location: Santa Clara, CA
Salary: $184,700–$324,800 / yr
Posted: 24 days ago
Freshness: Confirmed live yesterday
Nearby: 99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $206k

This role $255k

$129k $346k

below market most similar roles pay here above market

This role pays more than 96% of similar roles. Most pay $177,050–$235,750 — the blue band above. At the midpoint, this role pays about $255k versus about $206k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3595 open roles on FindRole.

Listed pay typically runs $166,600–$277,600 across 2772 roles with salary data.

Most-posted roles

View all roles at Apple Inc

At a glance

TL;DR · GPU Design Engineer, Memory Hierarchy

Role Posting Log in to save

As a GPU Design Engineer – Memory Hierarchy within the Silicon Technologies group, you will join the GPU Memory Hierarchy Design team to develop next-generation, high-performance, and power-efficient system-on-chip processors. Your primary responsibilities include specifying new micro-architectures, optimizing existing ones, and performing analysis on specific workloads across various product categories to identify bottlenecks and opportunities for improvement. You will build architectural models to assess feasibility and refine ideas while collaborating to boost overall team efficiency. The role requires expertise in CPU or GPU architecture, specifically regarding caches, memory subsystems, on-chip interconnect networks, data compression, or GPU pipelines. Required technical skills include Verilog, System Verilog, and HDL, along with proficiency in C/C++, Python, Perl, or Ruby for scripting and RTL modeling.

Skills

GPU Architecture Micro-architecture Verilog System Verilog HDL RTL C++ Python Perl Ruby SoC Cache Memory Subsystem On-chip Interconnect Data Compression Architectural Modeling

What you'll do

Specify new micro-architectures and optimize existing ones for high-performance, power-efficient processors.
Analyze specific workloads across product categories to identify performance bottlenecks and improvement opportunities.
Build and develop architectural models to assess the feasibility of new hardware ideas.
Design and manufacture next-generation system-on-chip (SoC) components.
Develop solutions for cache, memory subsystems, on-chip interconnect networks, or data compression.
Create RTL or architectural models to refine hardware designs.
Implement high-performance, low-power designs using Verilog, System Verilog, or HDL.

What we're looking for

Minimum of a BS degree and 10+ years of relevant experience.
Experience with CPU or GPU architecture and micro-architecture concepts.
Experience in cache, memory subsystem, on-chip interconnect network, data compression, or GPU pipeline.
Knowledge in C/C++ (preferred).
Experience in scripting languages such as Perl, Python, and Ruby (preferred).
Proficiency in high performance, low power designs (preferred).
Proficiency in Verilog/System Verilog and HDL (preferred).
Hands-on experience with RTL or architectural modeling (preferred).

Similar roles

GPU Design Engineer, Memory Hierarchy

Apple Inc

Santa Clara, CA 24 days ago $150,400–$277,600

Verilog System Verilog HDL Python Perl Ruby GPU Architecture SoC RTL Coding Cache On-chip Interconnect Data Compression Power Optimization Functional Simulation Debug

3+ yrs exp

Save

Graphics Cache Hierarchy Design Verification Engineer

Apple Inc

Santa Clara, CA 24 days ago $129,300–$194,700

SystemVerilog Verilog RTL Verification Computer Architecture GPU Architecture Object Oriented Programming Data Structures Perl Ruby Shell Scripting Makefiles HDL Simulators Waveform Viewers Caches Memory Management Unit Interconnects

Save

Graphics (GPU) Architectural Modeling Engineer

Apple Inc

Santa Clara, CA 24 days ago $184,700–$324,800

C++ Python Ruby Perl Verilog System Verilog VHDL CPU Architecture SIMD SoC Micro-architecture Performance Modeling HW/SW) co-validation Debug

10+ yrs exp

Save

GPU RTL Design Engineer

Apple Inc

Orlando, FL 58 days ago

Verilog SystemVerilog HDL Python Perl Ruby RTL Design Computer Architecture SoC Logic Design Cache Design On-chip Interconnect Data Compression Shader Processor Functional Simulation Debug

Save

GPU Design Engineer

Qualcomm

Austin, TX 24 days ago $203,700–$305,500

RTL Design Design Verification SystemVerilog Verilog GPU ASIC Micro-architecture coverage‑driven verification Assertions PPA SoC tape‑out Hardware Engineering

10+ yrs exp

Save

Staff Engineer, GPU Memory Architect

Samsung Electronics

San Diego, CA +1 2 days ago $151,000–$251,800

GPU Architecture SoC SRAM DRAM on‑chip interconnect Performance Modeling AI Inference Ray Tracing hardware‑software co‑design ARM x86 RISC-V Computer Architecture Low-Power Design

6+ yrs exp

Save