Graphics Cache Hierarchy Design Verification Engineer

Apple Inc

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Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$129,300–$194,700 / yr
Posted
15 days ago
Freshness
Confirmed live today
Nearby
99+ roles within 25 mi

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $210k
This role $162k
$113k most similar roles pay here $280k

This role pays less than 84% of similar roles. Most pay $177,287–$241,750 — the shaded band above. At the midpoint, this role pays about $162k versus about $210k for comparable roles.

Based on 240 similar postings.

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3513 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2730 roles with salary data.

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At a glance

TL;DR · Graphics Cache Hierarchy Design Verification Engineer

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As a Graphics Cache Hierarchy Design Verification Engineer within the Silicon Technologies group, you will perform pre-silicon RTL verification of graphics memory subsystem units including Caches, Memory Management Unit, Interconnects, and Link interface units. You will be responsible for authoring test plans for block or subsystem level functionality, architecting and developing complex verification software components, and collaborating with design team members to debug and close blocks. This role requires a deep understanding of micro-architectural details within the broader GPU design. Required skills include proficiency in Hardware Description Languages like Verilog or SystemVerilog, Object Oriented Programming, and Data Structures. Preferred qualifications include experience with Perl, Ruby, Shell scripting, Makefiles, and HDL simulators. The work focuses on the architectural and micro-architectural verification of sub-blocks within the memory hierarchy of a high-performance system-on-chip.

Skills

SystemVerilog Verilog RTL Verification Computer Architecture GPU Architecture Caches Memory Management Unit Interconnects Object Oriented Programming Data Structures HDL Simulators Waveform Viewers Perl Ruby Shell Scripting Makefiles

What you'll do

  • Perform pre-silicon RTL verification of graphics memory subsystem units including Caches, MMUs, Interconnects, and Link interfaces.
  • Author comprehensive test plans for block or subsystem level functionality.
  • Architect and develop complex verification software components for the GPU memory hierarchy.
  • Debug and close hardware blocks in coordination with design team members.
  • Verify micro-architectural details of sub-blocks within the broader GPU design.
  • Develop and maintain test benches ranging from individual sub-blocks to large subsystems.

What we're looking for

  • BS degree in CE, CS, or EE.
  • Completion of Computer Architecture or Computer systems coursework.
  • Experience with Hardware Description languages like Verilog or SystemVerilog.
  • Experience with Object Oriented Programming Languages and Data Structures.
  • Background in CPU or GPU architecture (preferred).
  • Design Verification coursework and experience with verification languages such as SystemVerilog (preferred).
  • Experience with HDL simulators, waveform viewers, and scripting languages like Perl, Ruby, Shell, or Makefiles (preferred).
  • Experience with caches and address translation units (preferred).

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