Solution Validation Engineer FPGA/SoC

Amd

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
San Jose, CA
Salary
$166,400–$249,600 / yr
Posted
8 days ago
Freshness
Confirmed live yesterday
Closes
Sep 3, 2027
Nearby
99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $186k
This role $208k
$127k most similar roles pay here $263k

This role pays more than 74% of similar roles. Most pay $160,000–$212,500 — the shaded band above. At the midpoint, this role pays about $208k versus about $186k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 367 open roles on FindRole.

Listed pay typically runs $166,400–$249,600 across 367 roles with salary data.

Most-posted roles

View all roles at Amd

At a glance

TL;DR · Solution Validation Engineer FPGA/SoC

Role Posting Log in to save

As a Solution Validation Engineer--FPGA/SoC, you will join the team to build and validate hardware/software co-design solutions for FPGA-based Systems. You will perform technical tasks across the entire product cycle, including architecture, design, and validation of IPs. Your daily responsibilities involve RTL development in SystemVerilog or Verilog for high-performance logic, writing firmware and low-level system software for ARM Cortex or RISC-V cores, and performing board bring-up and post-silicon validation. You will utilize the Vivado and Vitis ecosystems to integrate custom IPs with Network on Chip and memory subsystems. The role requires expertise in tools like Yocto-based Embedded Design Flow, Python, Tcl, and hardware debug tools such as oscilloscopes and logic analyzers. This work addresses technical challenges in AVB, networking, storage, automotive, aerospace, and emerging AI/ML workloads.

Skills

FPGA SystemVerilog Verilog VHDL Vivado Vitis Embedded Linux Yocto C C++ Python Tcl PCIe LPDDR5 RISC-V ARM Cortex Baremetal Git Makefiles

What you'll do

  • Design, verify, and validate high-performance logic in SystemVerilog/Verilog for data and control paths.
  • Develop firmware and low-level system software for ARM Cortex or RISC-V soft cores.
  • Build and customize embedded Linux images using Yocto-based Embedded Design Flow.
  • Integrate custom IPs with the Network on Chip (NoC) and memory using Vivado and Vitis ecosystems.
  • Perform pre-silicon verification and emulation to confirm functional correctness and performance.
  • Execute board bring-up and validation from first power-on through a stable, validated platform.
  • Conduct post-silicon validation to debug interactions between embedded software, hard/soft IPs, and FPGA fabric.

What we're looking for

  • Bachelor's or Master's degree in Computer Engineering or Electrical Engineering.
  • 8+ years of hands-on experience with FPGA designs.
  • Proficiency in SystemVerilog, Verilog, and/or VHDL with expertise in the Vivado toolchain.
  • Expertise in high-speed digital design including clocking, CDC, timing closure, and XDC/SDC constraints.
  • Experience developing embedded Linux using Yocto-based flows, including BSP configuration and device trees.
  • Proficiency in C/C++ for bare-metal programming on ARM or RISC-V cores.
  • Experience with high-speed interfaces such as PCIe, DDR5/6, Ethernet, and SerDes.
  • Ability to perform hardware debugging using oscilloscopes, logic analyzers, and ILA tools.

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