Embedded FPGA Engineer

Booz Allen Hamilton

Quick summary

Work type
On-site
Location
McLean, VA
Salary
$86,800–$198,000 / yr
Posted
2 days ago
Closes
Sep 15, 2026

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $190k
This role $142k
$70k most similar roles pay here $247k

This role pays less than 89% of similar roles. Most pay $164,600–$216,250 — the shaded band above. At the midpoint, this role pays about $142k versus about $190k for comparable roles.

Based on 240 similar postings.

Employer

About Booz Allen Hamilton

Booz Allen Hamilton is a management and technology consulting firm that provides analytics, digital, engineering, and cybersecurity solutions primarily to U.S. government agencies and commercial clients. Industry: Management & Technology Consulting

Booz Allen Hamilton currently has 711 open roles on FindRole.

Listed pay typically runs $86,800–$198,000 across 702 roles with salary data.

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View all roles at Booz Allen Hamilton

At a glance

TL;DR · Embedded FPGA Engineer

As an Embedded FPGA Engineer at our company, you will join a dynamic engineering team to develop and optimize digital signal processing (DSP) functions on SOSA/VPX systems. Your day-to-day responsibilities include designing and implementing FPGA-based DSP systems using HDL and Vitis HLS, developing efficient hardware blocks for real-time constraints, and collaborating with cross-functional teams to integrate FPGA designs with software and firmware. You will also test and validate your designs, optimize them for performance, and maintain comprehensive documentation. Ideal candidates have 3+ years of experience in FPGA or SDR solutions, proficiency in Verilog/VHDL, and familiarity with Xilinx tools like Vivado. Knowledge of digital design fundamentals, Linux environments, and RF testing is essential. Experience with SOSA/VPX systems and GPU acceleration is a plus.

What you'll do

  • Design and implement FPGA-based DSP systems using HDL and Vitis HLS.
  • Develop and optimize DSP algorithms for high-throughput hardware blocks.
  • Test, verify, and validate FPGA designs under real-time constraints.
  • Optimize FPGA designs for timing, area, power, and throughput.
  • Develop reusable hardware IP blocks for scalable DSP pipelines.
  • Maintain documentation including design notes and user guides.
  • Contribute to innovation by identifying new FPGA development techniques.

What we're looking for

  • 3+ years of experience developing FPGA or SDR solutions
  • Proficiency in HDL (Verilog, VHDL) and Vitis HLS for FPGA design
  • Experience with Xilinx Vivado and related FPGA development tools
  • Strong background in digital signal processing algorithms and optimization
  • Knowledge of Linux/UNIX environments and scripting languages
  • Ability to work independently and collaboratively within a cross-functional team

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