This role pays less than
92%
of similar roles. Most pay
$177,200–$239,462
— the shaded band above.
At the midpoint, this role pays about
$152k
versus about
$208k
for comparable roles.
Based on 240 similar postings.
Employer
About Microsoft
Microsoft Corporation is a global technology leader producing software, hardware, and cloud services including Windows, Office 365, Azure cloud platform, Xbox gaming, and Surface devices. Industry: Software & Cloud Computing
Microsoft currently has
599 open roles
on FindRole.
Listed pay typically runs
$119,800–$234,700
across 564 roles with salary data.
The Design Verification Engineer joins the Verification & Validation team within the Compute Silicon & Manufacturing Engineering organization to support cloud hardware infrastructure. This role involves owning or leading the verification of components used in Fabric Interconnect by collaborating with partner teams to define strategies and test plans. The engineer will develop UVM-based or Formal verification environments, run and debug simulations, and apply random-stimulus and coverage-based techniques to identify bugs. Key technical requirements include experience with SystemVerilog Test Bench, Python for post-processing, and the application of generative AI solutions to verification workflows. Candidates should possess expertise in protocols such as CHI and AMBA, along with knowledge of fabric interconnects, coherency, virtualization, security, interrupts, PCIe, or CXL. The role focuses on ensuring high-quality hardware manufacturing and optimizing cloud infrastructure for large-scale deployment.
What does a Design Verification Engineer earn?
Median $199612 from 78 postings across 10 companies.
Own or lead verification of components used in Fabric Interconnect.
Define verification strategies and test plans in collaboration with partner teams.
Develop UVM-based or Formal verification environments to drive design quality.
Run and debug simulations using random-stimulus and coverage-based techniques.
Innovate new methodologies and tools to improve verification efficiency.
Integrate generative AI solutions into daily verification workflows.
Coach and mentor team members in specific areas of expertise.
What we're looking for
A Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 2+ years of technical engineering experience.
A Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 1+ year of technical engineering experience.
Ability to pass the Microsoft Cloud Background Check.
Must provide proof of citizenship or protected status for access to export-controlled information.
1+ years of pre-silicon subsystem or IP verification experience (preferred).
Experience with CHI and AMBA protocols, fabric interconnects, coherency, virtualization, security, interrupts, PCIe, CXL, or protocol bridges (preferred).
Experience with UVM, SystemVerilog, Python, and developing test plans for coverage signoff (preferred).
Experience applying generative AI solutions to verification work or day-to-day tasks (preferred).