Senior Design Verification Engineer, Fabric Interconnect
Microsoft
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How this pay compares to similar roles
This role pays less than 89% of similar roles. Most pay $168,500–$229,100 — the blue band above. At the midpoint, this role pays about $152k versus about $199k for comparable roles.
Based on 240 similar postings.
Employer
Microsoft Corporation is a global technology leader producing software, hardware, and cloud services including Windows, Office 365, Azure cloud platform, Xbox gaming, and Surface devices. Industry: Software & Cloud Computing
Microsoft currently has 694 open roles on FindRole.
Listed pay typically runs $119,800–$234,700 across 651 roles with salary data.
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At a glance
The Design Verification Engineer - Fabric Interconnect joins the Verification & Validation team within the Compute Silicon & Manufacturing Engineering organization. This role focuses on the integration-level verification of Fabric Top, specifically addressing coherency, PCIe/CXL traffic, and configuration access traffic for cloud hardware. The engineer will develop UVM and System Verilog based verification environments, run and debug simulations, and interact with partner IP and SOC teams to define test plans. Key responsibilities include leveraging automation, formal-based methods, and generative AI solutions to improve verification efficiency. The position requires technical expertise in protocols such as CHI and AMBA, as well as experience with fabric interconnects, virtualization, and security. The work directly supports the development and manufacturing of state-of-the-art computer chips for cloud infrastructure.
What does a Design Verification Engineer earn?
Median $189224 from 84 postings across 10 companies.
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