Senior DTCO Engineer, CPU Physical Design
Nvidia
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How this pay compares to similar roles
This role pays more than 67% of similar roles. Most pay $164,438–$232,000 — the blue band above. At the midpoint, this role pays about $225k versus about $198k for comparable roles.
Based on 240 similar postings.
Employer
Samsung Electronics is a South Korean multinational corporation and a global leader in technology, specializing in consumer electronics, semiconductors, and home appliances.
Samsung Electronics currently has 94 open roles on FindRole.
Listed pay typically runs $106,000–$174,500 across 85 roles with salary data.
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At a glance
The Design Technology Co-Optimization (DTCO) Engineer, Design flow and Methodology joins the Global Advanced Technology Enablement team to drive technology development across the System LSI business. This role involves building highly efficient design and analysis flows and methodologies to push the power, performance, and area envelope for next-generation SoC products. Key responsibilities include developing CAD flows for custom design, exploring methodologies for low-power and high-performance goals, and collaborating with IP development teams to ensure process technology and design rules are consumable. The position requires expertise in synthesis, PnR, EM/IR, STA, and physical verification using Cadence Innovus and Synopsys Fusion Compiler. Candidates must possess strong skills in Tcl, Perl, and Python, along with knowledge of CMOS fundamentals, device physics, and machine-learning practices for improving productivity.
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