CPU Physical Design Methodology and Optimization Engineer

Apple Inc

Confirmed live yesterday Trusted

Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$184,700–$324,800 / yr
Posted
15 days ago
Freshness
Confirmed live yesterday

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $200k
This role $255k
$129k most similar roles pay here $346k

This role pays more than 92% of similar roles. Most pay $162,000–$237,250 — the shaded band above. At the midpoint, this role pays about $255k versus about $200k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 2925 open roles on FindRole.

Listed pay typically runs $166,600–$277,600 across 2305 roles with salary data.

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At a glance

TL;DR · CPU Physical Design Methodology and Optimization Engineer

As a CPU Physical Design Methodology and Optimization Engineer, you will join an innovative CPU design team to solve complex problems within the physical design methodology and optimization space. You will work with CAD and design teams to engineer new flows and algorithms specifically aimed at improving Power, Performance, and Area for industry-leading CPU designs. Your daily responsibilities include performing detailed analysis across partitions to identify optimization opportunities and developing new flow techniques to enhance performance and efficiency. This role requires cross-functional collaboration with STA, library, technology, and post-silicon teams. You will utilize Python, TCL, or Perl to write algorithms and code for PPA extraction while navigating challenges related to deep sub-micron technology. The work focuses on the technical optimization of CPU designs and exploring machine learning applications within the silicon design space.

What you'll do

  • Engineer new flows and algorithms to improve Power, Performance, and Area (PPA) of CPU designs.
  • Perform detailed analysis across partitions to identify specific optimization opportunities.
  • Develop new physical design focused flows to enhance CPU performance and efficiency.
  • Collaborate with CAD, STA, library, and technology teams to optimize physical design processes.
  • Apply machine learning techniques to solve problems within the silicon design space.
  • Write algorithms and code to extract Power, Performance, and Area metrics during physical design.
  • Lead physical design methodology and optimization techniques across various partitions.

What we're looking for

  • Minimum BS degree and 10+ years of relevant industry experience.
  • Experience in digital circuits, timing/power concepts, and logic design.
  • Experience with TCL or Perl.
  • Strong fundamentals in high-performance and low-power physical design techniques (preferred).
  • Experience using industry-standard synthesis, PnR, and STA tools (preferred).
  • Proficiency in programming and scripting in Python, TCL, or Perl (preferred).
  • Understanding of deep sub-micron technology challenges and ability to write algorithms to extract PPA during physical design (preferred).
  • Ability to work independently or lead methodology across partitions with cross-functional teams (preferred).

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