CPU Physical Design Methodology and Optimization Engineer

Apple Inc

Confirmed live yesterday Trusted

Quick summary

Work type: On-site
Location: Santa Clara, CA
Salary: $150,400–$277,600 / yr
Posted: 15 days ago
Freshness: Confirmed live yesterday
Nearby: 99+ roles within 25 mi

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Competitive pay

How this pay compares to similar roles

Similar $202k

This role $214k

$135k most similar roles pay here $293k

This role pays more than 64% of similar roles. Most pay $162,000–$241,750 — the shaded band above. At the midpoint, this role pays about $214k versus about $202k for comparable roles.

Based on 240 similar postings.

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 2925 open roles on FindRole.

Listed pay typically runs $166,600–$277,600 across 2305 roles with salary data.

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At a glance

TL;DR · CPU Physical Design Methodology and Optimization Engineer

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As a CPU Physical Design Methodology and Optimization Engineer, you will join an innovative CPU design team focused on solving complex problems within the physical design methodology and optimization space. You will work with CAD and design teams to engineer new flows and algorithms aimed at improving Power, Performance, and Area for industry-leading CPU designs. Your daily responsibilities include performing detailed analysis across partitions to identify optimization opportunities and developing specialized flow improvements to enhance performance and efficiency. This role requires cross-functional collaboration with STA, library, technology, and post-silicon teams. You will utilize Python, TCL, or Perl to write algorithms and code for extracting PPA metrics while navigating deep sub-micron technology challenges. The work centers on optimizing high-performance and low-power physical design techniques within the specific domain of CPU and SoC architecture.

Skills

Physical Design Synthesis PnR STA TCL Perl Python Machine Learning Digital Circuits Logic Design Deep Sub-micron Technology Scripting

What you'll do

Engineer new flows and algorithms to improve Power, Performance, and Area (PPA) of CPU designs.
Perform detailed analysis across partitions to identify specific optimization opportunities.
Develop physical design focused flows to enhance CPU performance and efficiency.
Implement machine learning techniques within the silicon design space.
Write scripts and code in Python, TCL, or Perl to extract PPA metrics during physical design.
Address challenges related to deep sub-micron technology through custom algorithms and coding.
Coordinate with CAD, STA, library, and post-silicon teams to improve optimization results.

What we're looking for

Minimum BS degree and 3+ years of relevant industry experience.
Experience in digital circuits, timing/power concepts, and logic design.
Experience with TCL or Perl.
Strong fundamentals in high-performance & low-power physical design techniques (preferred).
Experience using industry standard synthesis, PnR, and STA tools (preferred).
Proficiency in programming and scripting in Python, TCL, or Perl (preferred).
Understanding of deep sub-micron technology challenges and ability to write algorithms to extract PPA during physical design (preferred).
Ability to work well in a team with self-motivation and excellent communication skills (preferred).