CPU RTL Power Engineer

Qualcomm

Confirmed live today Trusted

Quick summary

Work type: On-site
Location: Austin, TXSanta Clara, CA
Salary: $155,400–$233,200 / yr
Posted: 40 days ago
Freshness: Confirmed live today
Closes: Mar 16, 2027
Nearby: 99+ roles within 25 mi

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $209k

This role $194k

$136k $282k

below market most similar roles pay here above market

This role pays less than 65% of similar roles. Most pay $177,087–$241,750 — the blue band above. At the midpoint, this role pays about $194k versus about $209k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 575 open roles on FindRole.

Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.

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At a glance

TL;DR · CPU RTL Power Engineer

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The CPU RTL Power Engineer joins the CPU Engineering group to support high-performance, low-power device development. In this role, you will own key aspects of CPU power modeling and analysis, specifically focusing on RTL power estimation and optimization for energy-efficient designs. Your daily responsibilities include estimating and analyzing RTL power for CPU modules, creating comprehensive power models, and identifying early power targets to achieve correlation with physical designs. You will also build scripts to automate estimation flows and develop algorithms to analyze complex hardware throttling mechanisms. The position requires proficiency in Verilog and VHDL, hands-on experience with PowerArtist and PTPX tools, and knowledge of logic design principles. Additionally, you will utilize Python or Perl to manage power and performance tradeoffs within EDP and TDP limits.

Skills

RTL Power Modeling PowerArtist PTPX Verilog VHDL Python Perl Low Power Design Clock Gating Logic Design Power Estimation Hardware Engineering

What you'll do

Estimate and analyze RTL power for CPU modules using PowerArtist or equivalent tools.
Optimize power at various design stages to meet specific performance and power targets.
Create comprehensive CPU power models and identify early power targets.
Achieve correlation between power models and physical design results.
Analyze power, performance, and area tradeoffs for high-performance CPU designs.
Build Python or Perl scripts to automate power estimation and analysis flows.
Create algorithms to analyze complex hardware throttling mechanisms for peak CPU performance.
Ensure designs stay within EDP, TDP, and peak current limits.

What we're looking for

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 4+ years of relevant work experience.
Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field and 3+ years of relevant work experience.
PhD in Electrical Engineering, Computer Engineering, Computer Science, or related field and 2+ years of relevant work experience.
BS degree in Electrical or Computer Engineering with 3-8 years of CPU RTL power modeling and estimation experience.
Deep understanding of CPU or ASIC low power design, including active/idle power optimization and RTL clock gating.
Working knowledge of Verilog and/or VHDL with hands-on experience in PowerArtist and PTPX tools.
Knowledge of logic design principles along with power and timing implications.
Experience using scripting languages such as Perl or Python (preferred).

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