CPU Processor Power Management Verification Engineer

Apple Inc

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
—
Salary
$150,400–$277,600 / yr
Posted
17 days ago
Freshness
Confirmed live yesterday

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $201k
This role $214k
$135k most similar roles pay here $293k

This role pays more than 66% of similar roles. Most pay $172,487–$229,100 — the shaded band above. At the midpoint, this role pays about $214k versus about $201k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3553 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2740 roles with salary data.

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At a glance

TL;DR · CPU Processor Power Management Verification Engineer

The CPU Processor Power Management Verification Engineer joins the processor verification team to focus on Power Management and Clock Control verification. This role involves collaborating with architecture and RTL designers to verify functionality correctness, developing test plans, and executing schedules for power management logic. Day-to-day responsibilities include developing tests in Assembly, Scripts, SystemVerilog, or vectors for simulation and emulation environments, root causing failures, and creating coverage monitors. The engineer will also develop checkers, transactors, and assertions while applying formal verification techniques to the design. Key technical requirements include experience with digital logic, microprocessor architecture, and Verilog/SystemVerilog-based testbenches. Proficiency in scripting languages like Perl or Python is required. The role addresses critical chip design challenges specifically involving power management architecture, clock control systems, and silicon bringup within emulation and FPGA environments.

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