CPU Physical Electrical Analysis Engineer

Apple Inc

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Work type: On-site
Location: Austin, TX
Posted: 17 days ago
Freshness: Confirmed live today
Nearby: 99+ roles within 25 mi

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How this pay compares to similar roles

Similar $205k

$136k most similar roles pay here $282k

This listing doesn't post a salary. Most similar roles pay $168,000–$241,750.

Based on 240 similar postings.

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3587 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2768 roles with salary data.

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At a glance

TL;DR · CPU Physical Electrical Analysis Engineer

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As a CPU Physical Electrical Analysis Engineer, you will join the hardware team to drive block and top-level analysis for high-performance processor projects within the EMIR, SIGEM, and Reliability spheres. Your daily responsibilities include managing power grid design, construction, and implementation using existing infrastructures or creating custom solutions in PNR tool environments. You will collaborate multi-functionally with CAD/EDA vendors, methodology teams, and SOC level teams to ensure analysis fidelity and meet IP delivery schedules. The role requires expertise in silicon level power delivery, electromigration, and IR drop analysis. You will utilize tools such as Apache Redhawk and Cadence Voltus while performing scripting for SAPR or EMIR flow automation. Your work focuses on solving complex challenges related to deep sub-micron technology and ensuring design sign-off closure across multiple blocks.

Skills

EMIR SIGEM Reliability Power Grid Design SAPR PNR VLSI Apache Redhawk Cadence Voltus STA Layout Scripting Electromigration IR Drop Analysis

What you'll do

Drive block and top-level EMIR, SIGEM, and reliability verification closure.
Design, construct, and implement power grids using existing infrastructure and custom PNR tool solutions.
Perform silicon-level power delivery, electromigration, and IR drop analysis.
Script SAPR or EMIR flow automation to process large-scale design data and debug issues.
Identify and resolve design sensitivities through automated tools across multiple domains.
Develop impactful design fixes for high-performance and low-power VLSI designs.
Coordinate with CAD/EDA vendors to ensure the fidelity of analysis results.
Communicate design status and drive convergence across multiple blocks and teams.

What we're looking for

Minimum BS degree and 10+ years of relevant industry experience.
Experience with silicon level power delivery, electromigration, and IR drop analysis.
Experience scripting SAPR or EMIR flow automation for large scale design data processing and debugging.
Experience implementing high-performance and low-power VLSI designs (preferred).
Experience with SAPR/PNR design flow infrastructure (preferred).
Understanding of challenges related to latest deep sub-micron technology (preferred).
Working knowledge of industry standard tools like Apache Redhawk, Cadence Voltus, PNR implementation, layout tools, verification, and STA (preferred).
Strong communication and presentation skills to summarize design status and drive convergence across teams (preferred).

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