CPU Physical Electrical Analysis Engineer

Apple Inc

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Santa Clara, CA
Salary
$150,400–$277,600 / yr
Posted
148 days ago
Freshness
Confirmed live yesterday

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $188k
This role $214k
$131k most similar roles pay here $293k

This role pays more than 72% of similar roles. Most pay $158,825–$216,250 — the shaded band above. At the midpoint, this role pays about $214k versus about $188k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1984 open roles on FindRole.

Listed pay typically runs $175,000–$277,600 across 1590 roles with salary data.

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At a glance

TL;DR · CPU Physical Electrical Analysis Engineer

As a CPU Physical Electrical Analysis Engineer, you will join the hardware team to drive block and top-level design of power-grid systems and perform analysis of high performance compute blocks within the EMIR, SIGEM, and Reliability space. Your daily responsibilities involve driving electrical verification closure, constructing power grid designs in PNR tool environments, and collaborating with CAD vendors, methodology teams, and implementation teams to ensure sign-off quality. The role requires expertise in PNR design implementation and STA. You will utilize tools such as Siemens, Ansys Redhawk, Seascape, or Cadence Voltus. Technical skills include C/C++ programming and the ability to write scripts in TCL, Python, or Perl for automation and data analysis using matplotlib or pandas. The work focuses on solving complex electrical challenges within high-performance computing architectures and RISC pipelines.

What you'll do

  • Drive block and top-level EMIR and electrical verification closure.
  • Design, construct, and implement power grids using PNR tool environments.
  • Develop custom solutions within the PNR environment when necessary.
  • Perform analysis of high-performance compute blocks in the EMIR/SIGEM/Reliability space.
  • Collaborate with CAD/EDA vendors to ensure the fidelity of analysis results.
  • Work with methodology teams to address and cover unique use cases.
  • Coordinate with implementation teams to drive design and sign-off closure.
  • Ensure IP delivery meets quality standards and schedules at the SoC level.

What we're looking for

  • Minimum of a Bachelor of Science degree.
  • At least 3 years of relevant industry experience.
  • Experience with PNR design implementation and STA.
  • Knowledge of computer architecture and RISC pipelines.
  • Ability to write and maintain scripts in TCL, Python, or Perl.
  • Proficiency in TCL-based automation with PNR and STA tools.
  • Familiarity with industry standard tools such as Siemens, Ansys Redhawk, Seascape, or Cadence Voltus.
  • Experience with data analysis techniques using Python, Perl, matplotlib, or pandas.

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