CPU Physical Electrical Analysis Engineer

Apple Inc

Confirmed live yesterday Trusted

Quick summary

Work type: On-site
Location: Santa Clara, CA
Salary: $150,400–$277,600 / yr
Posted: 15 days ago
Freshness: Confirmed live yesterday
Nearby: 99+ roles within 25 mi

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Salary context

Competitive pay

How this pay compares to similar roles

Similar $206k

This role $214k

$135k most similar roles pay here $293k

This role pays more than 59% of similar roles. Most pay $168,000–$243,600 — the shaded band above. At the midpoint, this role pays about $214k versus about $206k for comparable roles.

Based on 240 similar postings.

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3513 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2730 roles with salary data.

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At a glance

TL;DR · CPU Physical Electrical Analysis Engineer

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As a CPU Physical Electrical Analysis Engineer, you will join the hardware team to drive block and top-level design of power grids and perform analysis of high performance compute blocks within the EMIR, SIGEM, and Reliability space. Your daily responsibilities include driving electrical verification closure, constructing power grid designs in PNR tool environments, and collaborating with CAD vendors, methodology teams, and implementation teams to ensure sign-off quality. The role requires expertise in PNR design implementation and STA. You will utilize tools such as Siemens, Ansys Redhawk, Seascape, or Cadence Voltus. Technical skills include C/C++ programming and the ability to develop automation scripts using TCL, Python, or Perl. Additionally, you will apply data analysis techniques using matplotlib and pandas to solve complex electrical challenges within high performance computing architectures and RISC pipelines.

Skills

EMIR SIGEM Reliability PNR STA TCL Python Perl C++ Ansys Redhawk Seascape Cadence Voltus matplotlib pandas Computer Architecture RISC Pipelines

What you'll do

Drive block and top-level EMIR and electrical verification closure.
Design, construct, and implement power grids using existing infrastructures or custom PNR tool solutions.
Analyze high-performance compute blocks within the EMIR, SIGEM, and Reliability spaces.
Collaborate with CAD/EDA vendors to ensure the fidelity of analysis results.
Work with methodology teams to develop solutions for unique use cases.
Coordinate with implementation teams to drive design and sign-off closure.
Ensure IP delivery meets quality standards and schedules at the SoC level.

What we're looking for

Minimum BS degree and 3+ years of relevant industry experience.
Experience with PNR design implementation and STA.
Knowledge of computer architecture and RISC pipelines (preferred).
Experience in TCL-based automation with PNR & STA tools (preferred).
Familiarity with industry standard tools such as Siemens, Ansys Redhawk, Seascape, or Cadence Voltus (preferred).
Working knowledge of C/C++ (preferred).
Ability to write and maintain scripts in TCL, Python, or Perl (preferred).
Experience with data analysis techniques using Python, Perl, matplotlib, or pandas (preferred).

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