CPU Physical Electrical Analysis Engineer

Apple Inc

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Quick summary

Work type: On-site
Location: Beaverton, OR
Posted: 103 days ago
Freshness: Confirmed live today
Nearby: 99+ roles within 25 mi

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How this pay compares to similar roles

Similar $205k

$136k most similar roles pay here $282k

This listing doesn't post a salary. Most similar roles pay $168,000–$241,750.

Based on 240 similar postings.

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3587 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2768 roles with salary data.

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At a glance

TL;DR · CPU Physical Electrical Analysis Engineer

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The CPU Physical Electrical Analysis Engineer joins the Silicon Engineering Group to focus on block-level implementation. This role is responsible for driving block and top-level EMIR and electrical verification closure while managing power grid design, construction, and implementation within PNR tool environments. The engineer will collaborate with CAD/EDA vendors, methodology teams, and SOC level teams to ensure analysis fidelity and meet IP delivery quality. Key responsibilities include performing silicon level power delivery, electromigration, and IR drop analysis. Required skills include scripting for SAPR or EMIR flow automation to process large scale design data and isolate sensitivities. The role utilizes industry standard tools like Apache Redhawk and Cadence Voltus alongside PNR implementation, layout tools, and STA. The work addresses technical challenges inherent in latest deep sub-micron technology for high-performance and low-power VLSI designs.

Skills

EMIR Power Grid Design SAPR PNR Apache Redhawk Cadence Voltus VLSI STA Layout Tools Scripting Automation IR Drop Electromigration Deep Sub-micron Technology

What you'll do

Drive block and top-level EMIR and electrical verification closure.
Design, construct, and implement power grids using existing infrastructure or custom PNR tool solutions.
Perform silicon-level power delivery, electromigration, and IR drop analysis.
Script SAPR or EMIR flow automation to process large-scale design data and debug issues.
Identify and implement design fixes across multiple physical construction and analysis tool domains.
Collaborate with CAD/EDA vendors to ensure the fidelity of analysis results.
Coordinate with implementation teams to drive design sign-off and meet IP delivery schedules.

What we're looking for

Minimum BS degree and 10+ years of relevant industry experience.
Experience with silicon level power delivery, electromigration, and IR drop analysis.
Experience scripting SAPR or EMIR flow automation for large scale design data processing and debugging.
Experience implementing high-performance and low-power VLSI designs (preferred).
Experience with SAPR/PNR design flow infrastructure (preferred).
Understanding of challenges related to latest deep sub-micron technology (preferred).
Working knowledge of industry standard tools like Apache Redhawk, Cadence Voltus, PNR, layout tools, verification, and STA (preferred).
Strong communication and presentation skills to summarize design status and drive convergence (preferred).

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