CPU Physical Electrical Analysis Engineer

Apple Inc

Confirmed live yesterday Trusted

Quick summary

Work type: On-site
Location: Santa Clara, CA
Salary: $184,700–$324,800 / yr
Posted: 17 days ago
Freshness: Confirmed live yesterday
Nearby: 99+ roles within 25 mi

Market check

Salary context

Above market

How this pay compares to similar roles

Similar $205k

This role $255k

$129k most similar roles pay here $346k

This role pays more than 92% of similar roles. Most pay $167,375–$241,750 — the shaded band above. At the midpoint, this role pays about $255k versus about $205k for comparable roles.

Based on 240 similar postings.

Employer

About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 3587 open roles on FindRole.

Listed pay typically runs $165,800–$277,600 across 2768 roles with salary data.

Most-posted roles

View all roles at Apple Inc

At a glance

TL;DR · CPU Physical Electrical Analysis Engineer

Role Posting Log in to save

As a CPU Physical Electrical Analysis Engineer, you will join the hardware team to drive block and top-level design of power-grid and analysis of high performance compute blocks within the EMIR, SIGEM, and Reliability space. Your daily responsibilities include driving electrical verification closure, managing power grid construction and implementation in PNR tool environments, and collaborating with CAD vendors, methodology teams, and SoC level teams to ensure sign-off quality. You will utilize tools such as Siemens, Ansys Redhawk, Seascape, or Cadence Voltus while performing STA. The role requires technical proficiency in C/C++ and the ability to develop automation scripts using TCL, Python, or Perl for data analysis with packages like matplotlib and pandas. This position focuses on solving complex power integrity and reliability challenges within high-performance compute blocks including GPU, neural network, and CPU PNR blocks.

Skills

EMIR SIGEM Reliability PNR STA TCL Python Perl C++ Ansys Redhawk Seascape Cadence Voltus Matplotlib Pandas Computer Architecture RISC Pipelines

What you'll do

Drive block and top-level EMIR and electrical verification closure.
Design, construct, and implement power grids using PNR tool environments.
Develop custom solutions within the PNR environment when necessary.
Analyze high-performance compute blocks in the EMIR, SIGEM, and Reliability spaces.
Verify the fidelity of analysis results in coordination with CAD/EDA vendors.
Collaborate with methodology teams to address unique use cases for design closure.
Ensure IP delivery meets quality standards and schedules at the SoC level.
Develop and maintain automation scripts using TCL, Python, or Perl for PNR and STA tools.

What we're looking for

Minimum BS degree and 10+ years of relevant industry experience.
Experience with PNR design implementation and STA.
Knowledge of computer architecture and RISC pipelines with experience in compute-oriented block implementation (preferred).
Experience in TCL-based automation with PNR & STA tools (preferred).
Familiarity with industry standard tools such as Siemens, Ansys Redhawk, Seascape, or Cadence Voltus (preferred).
Working knowledge of C/C++ (preferred).
Ability to write and maintain scripts in TCL, Python, or Perl (preferred).
Experience with data analysis techniques using Python, Perl, matplotlib, or pandas (preferred).

Save