CAD Engineer – Design Verification Methodology

Apple Inc

Quick summary

Work type: On-site
Location: Beaverton, OR
Posted: 56 days ago
Nearby: 99+ roles within 25 mi

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How this pay compares to similar roles

Similar $185k

$126k most similar roles pay here $229k

This listing doesn't post a salary. Most similar roles pay $156,000–$213,743.

Based on 240 similar postings.

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About Apple Inc

Apple Inc. is a multinational technology company known for designing and manufacturing consumer electronics, software, and online services, including the iPhone, Mac, iPad, and App Store. Industry: Consumer Electronics & Software

Apple Inc currently has 1723 open roles on FindRole.

Listed pay typically runs $162,500–$272,100 across 1398 roles with salary data.

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At a glance

TL;DR · CAD Engineer – Design Verification Methodology

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Senior Hardware Verification Engineer needed for the cutting-edge semiconductor design team. This role involves developing and maintaining verification environments using SystemVerilog and UVM to ensure high-quality chip designs. Day-to-day tasks include writing testbenches, creating stimulus generators, and debugging simulation issues. Candidates should have a strong background in Python and experience with tools like Synopsys VCS, XCelium, or Modelsim. Knowledge of scripting languages for building simulation models from RTL is beneficial. The team works on large-scale projects that require innovative solutions to complex verification challenges, making this an ideal position for those passionate about pushing the boundaries of hardware design and verification.

Skills

Python Synopsys_VCS XCelium Modelsim Makfile RTL

What you'll do

Develop and maintain Python scripts for hardware verification.
Write testbenches using Synopsys VCS, XCelium, or Modelsim tools.
Create and update Makefiles to automate the build process of simulation models.
Debug and optimize RTL code for efficient simulation execution.
Collaborate on script development to enhance simulation workflows.

What we're looking for

Minimum BS degree and 3 years of relevant experience in hardware engineering.
Strong background in Python programming for automation and scripting.
MSEE/CE/CS degree preferred for advanced technical roles.
Experience with Synopsys VCS, XCelium, or Modelsim simulation tools.
Ability to write or maintain scripts or Makefiles for building simulation models.