Physical Design Engineer
Qualcomm
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How this pay compares to similar roles
This role pays less than 93% of similar roles. Most pay $164,437–$216,062 — the shaded band above. At the midpoint, this role pays about $134k versus about $190k for comparable roles.
Based on 240 similar postings.
Employer
Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.
Qualcomm currently has 623 open roles on FindRole.
Listed pay typically runs $148,300–$222,500 across 603 roles with salary data.
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At a glance
As an ASIC Design Verification Engineer within the ASICS Engineering group, you will support the development of high-performance, high-quality, and low-power IP blocks and SoCs. Your daily responsibilities include defining, modeling, designing, optimizing, verifying, validating, implementing, and documenting various products. You will assist in creating architectures, circuit specifications, logic designs, and system simulations based on specific requirements while collaborating with cross-functional teams to develop implementation strategies. The role involves evaluating process flows from high-level design through synthesis, place and route, timing, and power usage for custom circuits. To succeed, you must utilize tools such as Virtuoso and RTL to GDS Flow, along with scripting tools and programming languages. You will also be responsible for writing technical documentation for EDA, IP, and ASIC projects while solving complex problems in the semiconductor space.
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