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8 of up to 20 (filtered)

Senior Hardware Board Design Engineer, High-Speed

Cisco

Milpitas, CA 7 days ago $154,900–$225,300
Actively hiring Confirmed live today Posted this week High trust Competitive pay
ASIC PCB-design Schematic Capture Signal Integrity Power Integrity High-Speed Digital Design EMI/EMC Ethernet PCIe DDR4 DDR5 SerDes MDIO SPI I2C Cadence Concept/Design Entry Allegro HyperLynx ANSYS Keysight ADS Oscilloscope Protocol Analyzer Mixed-Signal Circuits
7+ yrs exp

Senior High-Speed IO Validation Engineer

Nvidia

Santa Clara, CA 12 days ago $168,000–$258,750
Actively hiring Confirmed live yesterday High trust Competitive pay
PCIe NVLink Infiniband Ethernet Python Post-Si bring up Signal Integrity SERDES Logic Analyzers BERT x86 Arm GPU Computing PCB Layout
6+ yrs exp

Post Silicon High-Speed I/O Validation Engineer

Amd

Austin, TX +1 25 days ago $163,200–$244,800
Actively hiring Confirmed live today High trust Competitive pay
UCIe UALink PCI Express CXL Python C/C++ Perl Linux Windows Post-Silicon Validation SoC Design Root-Cause Analysis Logic Analyzers Oscilloscopes System Architecture

Senior High-Speed I/O Engineer

Apple Inc

Cupertino, CA 48 days ago $184,700–$324,800
Actively hiring Confirmed live yesterday High trust Above market
High-Speed I/O C Objective-C Lua Signal Integrity USB Thunderbolt DisplayPort HDMI PCIe Firmware AI Root Cause Analysis Schematics Gauge R&R
7+ yrs exp

Senior High-Speed I/O Engineer

Apple Inc

Cupertino, CA 77 days ago $184,700–$324,800
Actively hiring Confirmed live yesterday High trust Above market
High-Speed I/O Signal Integrity C Objective-C Lua Hardware Bring-up USBC HDMI Thunderbolt DisplayPort PCIe Firmware Schematics Root Cause Analysis Statistical Analysis Gauge R&R AI-assisted Analytics
7+ yrs exp

Senior High-Speed IO Validation Engineer

Nvidia

Santa Clara, CA 141 days ago $136,000–$212,750
Actively hiring Confirmed live yesterday High trust Below market
PCIe NVLink CXL Ethernet USB HDMI Display Port SerDes Signal Integrity Test Automation BERT Logic Analyzer TDR PCB Layout Link Training Equalization Jitter Decomposition
3+ yrs exp

Senior Digital Design Engineer, High-Speed I/O and Photonics

Nvidia

Santa Clara, CA 141 days ago $136,000–$218,500
Actively hiring Confirmed live yesterday High trust Competitive pay
Verilog System Verilog RTL UVM Static Timing Analysis Synthesis P&R SerDes Ethernet InfiniBand PCIe USB Firmware Digital Design
5+ yrs exp Hybrid