Post Silicon High-Speed I/O Validation Engineer

Amd

Confirmed live yesterday High trust

Quick summary

Work type
On-site
Location
Austin, TXSanta Clara, CA
Salary
$163,200–$244,800 / yr
Posted
2 days ago
Freshness
Confirmed live yesterday
Closes
Oct 2, 2027

Market check

Salary context

Competitive pay

How this pay compares to similar roles

Similar $196k
This role $204k
$139k most similar roles pay here $256k

This role pays more than 55% of similar roles. Most pay $168,500–$223,000 — the shaded band above. At the midpoint, this role pays about $204k versus about $196k for comparable roles.

Based on 240 similar postings.

Employer

About Amd

AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors

Amd currently has 512 open roles on FindRole.

Listed pay typically runs $166,400–$249,600 across 512 roles with salary data.

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At a glance

TL;DR · Post Silicon High-Speed I/O Validation Engineer

Post Silicon High-Speed I/O Validation Engineer will join the datacenter CPU post silicon validation team to focus on high-speed IO technologies including UCIe, UALink, PCI Express, and Compute Express Link. This senior role involves developing and executing feature enablement and validation test plans for SoC and system-level features across server products. The engineer will build post-silicon validation infrastructure involving software, hardware, automation environments, and lab setups while performing root-cause analysis for SoC issues. Key responsibilities include creating test content for focus and stress testing, collaborating on tool development, and leading internal task forces. Required skills include experience with x86 microprocessor architecture, Linux or Windows operating systems, and programming languages like C/C++, Python, or Perl. The role requires proficiency with lab equipment such as oscilloscopes and logic analyzers to debug complex multi-socket server interfaces.

What you'll do

  • Develop and execute feature enablement and validation test plans for high-speed IO across server products.
  • Create test content for both focused testing and system-level stress testing of the IO domain.
  • Build post-silicon validation infrastructure including software, hardware, automation environments, and lab setups.
  • Test interactions between various SoC features using specialized validation infrastructure.
  • Debug and perform root-cause analysis for complex SoC-related issues.
  • Develop tools to improve SoC validation and debug processes in collaboration with cross-functional teams.
  • Improve post-silicon validation test strategies, methodologies, and overall processes.
  • Lead internal task forces and participate in industry consortiums to drive technical innovation.

What we're looking for

  • Bachelor's or Master's Degree in Computer Science, Computer Engineering, Electrical Engineering, or equivalent.
  • Experience in UCIe, UALink, PCIe Gen5/6+, CXL, or other inter-die and multi-socket server interfaces (preferred).
  • Understanding of modern x86 microprocessor architecture and Server platform architecture (preferred).
  • Experience developing validation methodologies, infrastructure, test plans, and workloads (preferred).
  • Participation in silicon bring up and debug to support internal engineering teams (preferred).
  • Familiarity with programming or scripting languages such as C/C++, Python, or Perl (preferred).
  • Working knowledge of Server OSes like Linux or Windows (preferred).
  • Extensive experience with lab equipment, board-level debug, and system architecture (preferred).

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