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PCIe NVLink CXL Ethernet USB SERDES Signal Integrity Firmware Drivers Automated Debug Triage Oscilloscopes BERTs Protocol Analyzers Logic Analyzers ATE AI Agents +11 more Show less

SystemVerilog UVM Ethernet NVLink CXL Python Perl Assertion-based Verification Functional Coverage ASIC Design High Speed I/O Verification Infrastructure Scripting post silicon verification +9 more Show less

High-Speed I/O PHY IP SoC AXI CHI CXS.B CXL PCIe UA-Link Signal Integrity Power Integrity Mixed-Signal Design Digital Design Chiplet Silicon Design +10 more Show less

SERDES PCIe USB4 UFS DP MIPI Signal Integrity Power Integrity Python C# Oscilloscopes J-BERT VLSI CMOS ASIC Test Automation Board Design +12 more Show less

PCIe CXL UCIe Python C/C++ Perl Linux Windows Post-Silicon Validation SoC Oscilloscopes Logic Analyzers Lab Equipment root-cause analysis +9 more Show less

PCI Express CXL x86 Python C/C++ Perl Linux JTAG Oscilloscopes Protocol Analyzers Post-Silicon Validation BIOS Firmware Networking Root Cause Analysis Verification Emulation +12 more Show less