PCIe, CXL and Highspeed IO Validation Engineer
Amd
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How this pay compares to similar roles
This role pays more than 57% of similar roles. Most pay $168,500–$231,737 — the shaded band above. At the midpoint, this role pays about $205k versus about $200k for comparable roles.
Based on 240 similar postings.
Employer
AMD (Advanced Micro Devices) is a semiconductor company that develops high-performance processors, graphics cards, and adaptive computing solutions for gaming, data centers, and embedded markets. Industry: Semiconductors
Amd currently has 374 open roles on FindRole.
Listed pay typically runs $166,400–$249,600 across 374 roles with salary data.
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At a glance
The High Speed IO (HSIO) Validation Engineer joins the team to validate and debug high-speed interfaces across CPU and GPU platforms for data center servers and AI systems. The role involves executing validation plans, performing post-silicon bring-up, characterization, compliance testing, and interoperability validation. You will collaborate with PHY design, firmware, and platform teams to resolve silicon and system-level issues while developing test automation scripts and data analysis tools. Key technical requirements include experience with PCIe Gen5/Gen6/Gen7, UALink, xGMI, CXL, and Ethernet technologies. Candidates must possess a strong understanding of signal integrity, equalization techniques like CTLE and DFE, and proficiency in Python or C/C++. Day-to-day work involves using oscilloscopes, BERTs, VNAs, and protocol analyzers to analyze link training behavior and ensure product quality for high-speed serial interfaces within complex computing environments.
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