Senior Bench Test Engineer, HSIO

Qualcomm

Confirmed live today High trust

Quick summary

Work type
On-site
Location
San Diego, CA
Salary
$117,800–$176,600 / yr
Posted
26 days ago
Freshness
Confirmed live today
Closes
Mar 30, 2027

Market check

Salary context

Below market

How this pay compares to similar roles

Similar $176k
This role $147k
$107k $221k
below market most similar roles pay here above market

This role pays less than 73% of similar roles. Most pay $147,200–$204,475 — the blue band above. At the midpoint, this role pays about $147k versus about $176k for comparable roles.

Based on 240 similar postings.

Employer

About Qualcomm

Qualcomm is a leading American semiconductor and telecommunications company based in San Diego, CA.

Qualcomm currently has 575 open roles on FindRole.

Listed pay typically runs $147,900–$221,900 across 550 roles with salary data.

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At a glance

TL;DR · Senior Bench Test Engineer, HSIO

The Senior Bench Test Engineer, HSIO joins the Post Silicon Engineering group to develop test solutions for highly integrated SOCs. This role involves defining and executing test methodologies and characterization for High Speed SERDES Interfaces, including PCIe, USB4, UFS, DP, MIPI, and various DRAM subsystems. The engineer will develop characterization plans to optimize design parameters, validate electrical compliance, and drive first silicon bring up and debug for designs fabricated at external foundries. Key responsibilities include performing technical data analysis of parametric performance and assisting in hardware design to debug power and signal integrity issues. Required skills include five years of High Speed Silicon Validation experience, knowledge of VLSI technologies, and proficiency with lab equipment like Oscilloscopes, TDRs, VNAs, and J-BERTs, alongside Python or C# for test automation.

What you'll do

  • Define and execute test methodologies for High Speed SERDES interfaces like PCIe, USB4, and UFS.
  • Develop and execute characterization plans to optimize design parameters and validate electrical compliance.
  • Drive first silicon bring-up and debug to qualify designs fabricated at external foundries.
  • Perform technical data analysis of parametric performance over various operating conditions and configurations.
  • Assist in hardware design and debug power integrity and signal integrity issues for packages and boards.
  • Resolve customer issues and RMA debugs in a time-critical environment.
  • Conduct specialized analyses including feasibility studies, signal integrity, and teardown analyses.

What we're looking for

  • Must have 5+ years of experience in High Speed Silicon Validation.
  • Must have a Bachelor's degree in a related field and 2+ years of Hardware Engineering experience.
  • Must have a Master's degree in a related field and 1+ year of Hardware Engineering experience.
  • Must have a PhD in Computer Science, Electrical/Electronics Engineering, or a related field.
  • Good understanding of VLSI technologies, CMOS analog and digital integrated circuits, mixed-signal, and semiconductor physics (preferred).
  • Knowledge of High Speed test and characterization including eye diagrams, JTOL performance, and jitter analysis (preferred).
  • Hands-on experience with lab equipment such as Oscilloscopes, TDRs/VNAs, and J-BERT (preferred).
  • Experience with Python/C# for test automation (preferred).

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